URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [rtl/] [verilog/] [coregen/] [summary.log] - Diff between revs 157 and 167

Rev 157	Rev 167
Line 1...	Line 1...

`User Configuration`	`User Configuration`
`-------------------------------------`	`-------------------------------------`
`Algorithm : Minimum_Area`	`Algorithm : Minimum_Area`
`Memory Type : Single_Port_RAM`	`Memory Type : True_Dual_Port_RAM`
`Port A Read Width : 16`	`Port A Read Width : 16`
	`Port B Read Width : 16`
`Port A Write Width : 16`	`Port A Write Width : 16`
`Memory Depth : 2048`	`Port B Write Width : 16`
	`Memory Depth : 8192`
`--------------------------------------------------------------`	`--------------------------------------------------------------`

`Block RAM resource(s) (9K BRAMs) : 0`	`Block RAM resource(s) (9K BRAMs) : 0`
`Block RAM resource(s) (18K BRAMs) : 2`	`Block RAM resource(s) (18K BRAMs) : 8`
`--------------------------------------------------------------`	`--------------------------------------------------------------`
`Clock A Frequency : 100`	`Clock A Frequency : 100`
`Port A Enable Rate : 100`	`Port A Enable Rate : 100`
`Port A Write Rate : 50`	`Port A Write Rate : 50`
`----------------------------------------------------------`	`----------------------------------------------------------`
`Estimated Power for IP : 6.192928 mW`	`Estimated Power for IP : 7.975106 mW`
`----------------------------------------------------------`	`----------------------------------------------------------`