Line 388... |
Line 388... |
wire reset_pin;
|
wire reset_pin;
|
wire reset_pin_n;
|
wire reset_pin_n;
|
wire reset_n;
|
wire reset_n;
|
|
|
// Debug interface
|
// Debug interface
|
wire omsp0_dbg_i2c_scl;
|
wire omsp_dbg_i2c_scl;
|
wire omsp0_dbg_i2c_sda_in;
|
wire omsp_dbg_i2c_sda_in;
|
|
wire omsp_dbg_i2c_sda_out;
|
wire omsp0_dbg_i2c_sda_out;
|
wire omsp0_dbg_i2c_sda_out;
|
|
wire omsp1_dbg_i2c_sda_out;
|
wire [23:0] chipscope_trigger;
|
wire [23:0] chipscope_trigger;
|
wire omsp0_dbg_uart_rxd;
|
|
wire omsp0_dbg_uart_txd;
|
|
|
|
// Data memory
|
// Data memory
|
wire [`DMEM_MSB:0] omsp0_dmem_addr;
|
wire [`DMEM_MSB:0] omsp0_dmem_addr;
|
wire omsp0_dmem_cen;
|
wire omsp0_dmem_cen;
|
|
wire omsp0_dmem_cen_sp;
|
|
wire omsp0_dmem_cen_dp;
|
wire [15:0] omsp0_dmem_din;
|
wire [15:0] omsp0_dmem_din;
|
wire [1:0] omsp0_dmem_wen;
|
wire [1:0] omsp0_dmem_wen;
|
wire [15:0] omsp0_dmem_dout;
|
wire [15:0] omsp0_dmem_dout;
|
|
wire [15:0] omsp0_dmem_dout_sp;
|
|
wire [15:0] omsp0_dmem_dout_dp;
|
|
reg omsp0_dmem_dout_sel;
|
|
|
|
wire [`DMEM_MSB:0] omsp1_dmem_addr;
|
|
wire omsp1_dmem_cen;
|
|
wire omsp1_dmem_cen_sp;
|
|
wire omsp1_dmem_cen_dp;
|
|
wire [15:0] omsp1_dmem_din;
|
|
wire [1:0] omsp1_dmem_wen;
|
|
wire [15:0] omsp1_dmem_dout;
|
|
wire [15:0] omsp1_dmem_dout_sp;
|
|
wire [15:0] omsp1_dmem_dout_dp;
|
|
reg omsp1_dmem_dout_sel;
|
|
|
// Program memory
|
// Program memory
|
wire [`PMEM_MSB:0] omsp0_pmem_addr;
|
wire [`PMEM_MSB:0] omsp0_pmem_addr;
|
wire omsp0_pmem_cen;
|
wire omsp0_pmem_cen;
|
wire [15:0] omsp0_pmem_din;
|
wire [15:0] omsp0_pmem_din;
|
wire [1:0] omsp0_pmem_wen;
|
wire [1:0] omsp0_pmem_wen;
|
wire [15:0] omsp0_pmem_dout;
|
wire [15:0] omsp0_pmem_dout;
|
|
|
|
wire [`PMEM_MSB:0] omsp1_pmem_addr;
|
|
wire omsp1_pmem_cen;
|
|
wire [15:0] omsp1_pmem_din;
|
|
wire [1:0] omsp1_pmem_wen;
|
|
wire [15:0] omsp1_pmem_dout;
|
|
|
// UART
|
// UART
|
wire omsp0_uart_rxd;
|
wire omsp0_uart_rxd;
|
wire omsp0_uart_txd;
|
wire omsp0_uart_txd;
|
|
|
// LEDs & Switches
|
// LEDs & Switches
|
wire [3:0] omsp0_switch;
|
wire [3:0] omsp_switch;
|
wire [3:0] omsp0_led;
|
wire [1:0] omsp0_led;
|
|
wire [1:0] omsp1_led;
|
|
|
|
|
//=============================================================================
|
//=============================================================================
|
// 2) RESET GENERATION & FPGA STARTUP
|
// 2) RESET GENERATION & FPGA STARTUP
|
//=============================================================================
|
//=============================================================================
|
Line 490... |
Line 513... |
|
|
// Clock & Reset
|
// Clock & Reset
|
.dco_clk (dco_clk), // Fast oscillator (fast clock)
|
.dco_clk (dco_clk), // Fast oscillator (fast clock)
|
.reset_n (reset_n), // Reset Pin (low active, asynchronous and non-glitchy)
|
.reset_n (reset_n), // Reset Pin (low active, asynchronous and non-glitchy)
|
|
|
// Serial Debug Interface (UART)
|
|
.dbg_uart_rxd (omsp0_dbg_uart_rxd), // Debug interface: UART RXD (asynchronous)
|
|
.dbg_uart_txd (omsp0_dbg_uart_txd), // Debug interface: UART TXD
|
|
|
|
// Serial Debug Interface (I2C)
|
// Serial Debug Interface (I2C)
|
.dbg_i2c_addr (7'h50), // Debug interface: I2C Address
|
.dbg_i2c_addr (7'd50), // Debug interface: I2C Address
|
.dbg_i2c_broadcast (7'h4F), // Debug interface: I2C Broadcast Address (for multicore systems)
|
.dbg_i2c_broadcast (7'd49), // Debug interface: I2C Broadcast Address (for multicore systems)
|
.dbg_i2c_scl (omsp0_dbg_i2c_scl), // Debug interface: I2C SCL
|
.dbg_i2c_scl (omsp_dbg_i2c_scl), // Debug interface: I2C SCL
|
.dbg_i2c_sda_in (omsp0_dbg_i2c_sda_in), // Debug interface: I2C SDA IN
|
.dbg_i2c_sda_in (omsp_dbg_i2c_sda_in), // Debug interface: I2C SDA IN
|
.dbg_i2c_sda_out (omsp0_dbg_i2c_sda_out), // Debug interface: I2C SDA OUT
|
.dbg_i2c_sda_out (omsp0_dbg_i2c_sda_out), // Debug interface: I2C SDA OUT
|
|
|
// Data Memory
|
// Data Memory
|
.dmem_addr (omsp0_dmem_addr), // Data Memory address
|
.dmem_addr (omsp0_dmem_addr), // Data Memory address
|
.dmem_cen (omsp0_dmem_cen), // Data Memory chip enable (low active)
|
.dmem_cen (omsp0_dmem_cen), // Data Memory chip enable (low active)
|
Line 520... |
Line 539... |
// UART
|
// UART
|
.uart_rxd (omsp0_uart_rxd), // UART Data Receive (RXD)
|
.uart_rxd (omsp0_uart_rxd), // UART Data Receive (RXD)
|
.uart_txd (omsp0_uart_txd), // UART Data Transmit (TXD)
|
.uart_txd (omsp0_uart_txd), // UART Data Transmit (TXD)
|
|
|
// Switches & LEDs
|
// Switches & LEDs
|
.switch (omsp0_switch), // Input switches
|
.switch (omsp_switch), // Input switches
|
.led (omsp0_led) // LEDs
|
.led (omsp0_led) // LEDs
|
);
|
);
|
|
|
|
|
//=============================================================================
|
//=============================================================================
|
// 6) PROGRAM AND DATA MEMORIES
|
// 5) OPENMSP430 SYSTEM 1
|
//=============================================================================
|
//=============================================================================
|
|
|
|
omsp_system_1 omsp_system_1_inst (
|
|
|
|
// Clock & Reset
|
|
.dco_clk (dco_clk), // Fast oscillator (fast clock)
|
|
.reset_n (reset_n), // Reset Pin (low active, asynchronous and non-glitchy)
|
|
|
|
// Serial Debug Interface (I2C)
|
|
.dbg_i2c_addr (7'd51), // Debug interface: I2C Address
|
|
.dbg_i2c_broadcast (7'd49), // Debug interface: I2C Broadcast Address (for multicore systems)
|
|
.dbg_i2c_scl (omsp_dbg_i2c_scl), // Debug interface: I2C SCL
|
|
.dbg_i2c_sda_in (omsp_dbg_i2c_sda_in), // Debug interface: I2C SDA IN
|
|
.dbg_i2c_sda_out (omsp1_dbg_i2c_sda_out), // Debug interface: I2C SDA OUT
|
|
|
// Data Memory
|
// Data Memory
|
ram_16x512 ram_16x512_dmem (
|
.dmem_addr (omsp1_dmem_addr), // Data Memory address
|
|
.dmem_cen (omsp1_dmem_cen), // Data Memory chip enable (low active)
|
|
.dmem_din (omsp1_dmem_din), // Data Memory data input
|
|
.dmem_wen (omsp1_dmem_wen), // Data Memory write enable (low active)
|
|
.dmem_dout (omsp1_dmem_dout), // Data Memory data output
|
|
|
|
// Program Memory
|
|
.pmem_addr (omsp1_pmem_addr), // Program Memory address
|
|
.pmem_cen (omsp1_pmem_cen), // Program Memory chip enable (low active)
|
|
.pmem_din (omsp1_pmem_din), // Program Memory data input (optional)
|
|
.pmem_wen (omsp1_pmem_wen), // Program Memory write enable (low active) (optional)
|
|
.pmem_dout (omsp1_pmem_dout), // Program Memory data output
|
|
|
|
// Switches & LEDs
|
|
.switch (omsp_switch), // Input switches
|
|
.led (omsp1_led) // LEDs
|
|
);
|
|
|
|
|
|
//=============================================================================
|
|
// 6) PROGRAM AND DATA MEMORIES
|
|
//=============================================================================
|
|
|
|
// Memory muxing (CPU 0)
|
|
assign omsp0_dmem_cen_sp = omsp0_dmem_addr[`DMEM_MSB] | omsp0_dmem_cen;
|
|
assign omsp0_dmem_cen_dp = ~omsp0_dmem_addr[`DMEM_MSB] | omsp0_dmem_cen;
|
|
assign omsp0_dmem_dout = omsp0_dmem_dout_sel ? omsp0_dmem_dout_sp : omsp0_dmem_dout_dp;
|
|
|
|
always @ (posedge dco_clk or posedge dco_rst)
|
|
if (dco_rst) omsp0_dmem_dout_sel <= 1'b1;
|
|
else if (~omsp0_dmem_cen_sp) omsp0_dmem_dout_sel <= 1'b1;
|
|
else if (~omsp0_dmem_cen_dp) omsp0_dmem_dout_sel <= 1'b0;
|
|
|
|
// Memory muxing (CPU 1)
|
|
assign omsp1_dmem_cen_sp = omsp1_dmem_addr[`DMEM_MSB] | omsp1_dmem_cen;
|
|
assign omsp1_dmem_cen_dp = ~omsp1_dmem_addr[`DMEM_MSB] | omsp1_dmem_cen;
|
|
assign omsp1_dmem_dout = omsp1_dmem_dout_sel ? omsp1_dmem_dout_sp : omsp1_dmem_dout_dp;
|
|
|
|
always @ (posedge dco_clk or posedge dco_rst)
|
|
if (dco_rst) omsp1_dmem_dout_sel <= 1'b1;
|
|
else if (~omsp1_dmem_cen_sp) omsp1_dmem_dout_sel <= 1'b1;
|
|
else if (~omsp1_dmem_cen_dp) omsp1_dmem_dout_sel <= 1'b0;
|
|
|
|
// Data Memory (CPU 0)
|
|
ram_16x1k_sp ram_16x1k_sp_dmem_omsp0 (
|
.clka ( dco_clk),
|
.clka ( dco_clk),
|
.ena (~omsp0_dmem_cen),
|
.ena (~omsp0_dmem_cen_sp),
|
.wea (~omsp0_dmem_wen),
|
.wea (~omsp0_dmem_wen),
|
.addra ( omsp0_dmem_addr),
|
.addra ( omsp0_dmem_addr[`DMEM_MSB-1:0]),
|
.dina ( omsp0_dmem_din),
|
.dina ( omsp0_dmem_din),
|
.douta ( omsp0_dmem_dout)
|
.douta ( omsp0_dmem_dout_sp)
|
);
|
);
|
|
|
|
// Data Memory (CPU 1)
|
|
ram_16x1k_sp ram_16x1k_sp_dmem_omsp1 (
|
|
.clka ( dco_clk),
|
|
.ena (~omsp1_dmem_cen_sp),
|
|
.wea (~omsp1_dmem_wen),
|
|
.addra ( omsp1_dmem_addr[`DMEM_MSB-1:0]),
|
|
.dina ( omsp1_dmem_din),
|
|
.douta ( omsp1_dmem_dout_sp)
|
|
);
|
|
|
// Program Memory
|
// Shared Data Memory
|
ram_16x2k ram_16x2k_pmem (
|
ram_16x1k_dp ram_16x1k_dp_dmem_shared (
|
|
.clka ( dco_clk),
|
|
.ena (~omsp0_dmem_cen_dp),
|
|
.wea (~omsp0_dmem_wen),
|
|
.addra ( omsp0_dmem_addr[`DMEM_MSB-1:0]),
|
|
.dina ( omsp0_dmem_din),
|
|
.douta ( omsp0_dmem_dout_dp),
|
|
.clkb ( dco_clk),
|
|
.enb (~omsp1_dmem_cen_dp),
|
|
.web (~omsp1_dmem_wen),
|
|
.addrb ( omsp1_dmem_addr[`DMEM_MSB-1:0]),
|
|
.dinb ( omsp1_dmem_din),
|
|
.doutb ( omsp1_dmem_dout_dp)
|
|
);
|
|
|
|
// Shared Program Memory
|
|
ram_16x8k_dp ram_16x8k_dp_pmem_shared (
|
.clka ( dco_clk),
|
.clka ( dco_clk),
|
.ena (~omsp0_pmem_cen),
|
.ena (~omsp0_pmem_cen),
|
.wea (~omsp0_pmem_wen),
|
.wea (~omsp0_pmem_wen),
|
.addra ( omsp0_pmem_addr),
|
.addra ( omsp0_pmem_addr),
|
.dina ( omsp0_pmem_din),
|
.dina ( omsp0_pmem_din),
|
.douta ( omsp0_pmem_dout)
|
.douta ( omsp0_pmem_dout),
|
|
.clkb ( dco_clk),
|
|
.enb (~omsp1_pmem_cen),
|
|
.web (~omsp1_pmem_wen),
|
|
.addrb ( omsp1_pmem_addr),
|
|
.dinb ( omsp1_pmem_din),
|
|
.doutb ( omsp1_pmem_dout)
|
);
|
);
|
|
|
|
|
//=============================================================================
|
//=============================================================================
|
// 7) I/O CELLS
|
// 7) I/O CELLS
|
Line 570... |
Line 677... |
OBUF SPI_HOLD_PIN (.I(1'b1), .O(SPI_HOLDn_MISO3));
|
OBUF SPI_HOLD_PIN (.I(1'b1), .O(SPI_HOLDn_MISO3));
|
|
|
//----------------------------------------------
|
//----------------------------------------------
|
// User DIP Switch x4
|
// User DIP Switch x4
|
//----------------------------------------------
|
//----------------------------------------------
|
IBUF SW3_PIN (.O(omsp0_switch[3]), .I(GPIO_DIP4));
|
IBUF SW3_PIN (.O(omsp_switch[3]), .I(GPIO_DIP4));
|
IBUF SW2_PIN (.O(omsp0_switch[2]), .I(GPIO_DIP3));
|
IBUF SW2_PIN (.O(omsp_switch[2]), .I(GPIO_DIP3));
|
IBUF SW1_PIN (.O(omsp0_switch[1]), .I(GPIO_DIP2));
|
IBUF SW1_PIN (.O(omsp_switch[1]), .I(GPIO_DIP2));
|
IBUF SW0_PIN (.O(omsp0_switch[0]), .I(GPIO_DIP1));
|
IBUF SW0_PIN (.O(omsp_switch[0]), .I(GPIO_DIP1));
|
|
|
//----------------------------------------------
|
//----------------------------------------------
|
// User LEDs
|
// User LEDs
|
//----------------------------------------------
|
//----------------------------------------------
|
OBUF LED3_PIN (.I(omsp0_led[3]), .O(GPIO_LED4));
|
OBUF LED3_PIN (.I(omsp1_led[1]), .O(GPIO_LED4));
|
OBUF LED2_PIN (.I(omsp0_led[2]), .O(GPIO_LED3));
|
OBUF LED2_PIN (.I(omsp1_led[0]), .O(GPIO_LED3));
|
OBUF LED1_PIN (.I(omsp0_led[1]), .O(GPIO_LED2));
|
OBUF LED1_PIN (.I(omsp0_led[1]), .O(GPIO_LED2));
|
OBUF LED0_PIN (.I(omsp0_led[0]), .O(GPIO_LED1));
|
OBUF LED0_PIN (.I(omsp0_led[0]), .O(GPIO_LED1));
|
|
|
//----------------------------------------------
|
//----------------------------------------------
|
// Silicon Labs CP2102 USB-to-UART Bridge Chip
|
// Silicon Labs CP2102 USB-to-UART Bridge Chip
|
Line 680... |
Line 787... |
//----------------------------------------------
|
//----------------------------------------------
|
// Peripheral Modules (PMODs) and GPIO
|
// Peripheral Modules (PMODs) and GPIO
|
// https://www.digilentinc.com/PMODs
|
// https://www.digilentinc.com/PMODs
|
//----------------------------------------------
|
//----------------------------------------------
|
|
|
`ifdef DBG_UART
|
assign omsp_dbg_i2c_sda_out = omsp0_dbg_i2c_sda_out & omsp1_dbg_i2c_sda_out;
|
// Connector J5
|
|
IOBUF PMOD1_P1_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD1_P1));
|
|
IOBUF PMOD1_P2_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD1_P2));
|
|
OBUF PMOD1_P3_PIN ( .I(omsp0_dbg_uart_txd), .O (PMOD1_P3));
|
|
IBUF PMOD1_P4_PIN ( .O(omsp0_dbg_uart_rxd), .I (PMOD1_P4));
|
|
IOBUF PMOD1_P7_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD1_P7));
|
|
IBUF PMOD1_P8_PIN ( .O(), .I (PMOD1_P8));
|
|
IOBUF PMOD1_P9_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD1_P9));
|
|
IOBUF PMOD1_P10_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD1_P10));
|
|
|
|
`else
|
|
// Connector J5
|
// Connector J5
|
IOBUF PMOD1_P1_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD1_P1));
|
IOBUF PMOD1_P1_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD1_P1));
|
IOBUF PMOD1_P2_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD1_P2));
|
IOBUF PMOD1_P2_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD1_P2));
|
IOBUF PMOD1_P3_PIN (.T(omsp0_dbg_i2c_sda_out), .I(1'b0), .O(omsp0_dbg_i2c_sda_in), .IO(PMOD1_P3));
|
IOBUF PMOD1_P3_PIN (.T(omsp_dbg_i2c_sda_out), .I(1'b0), .O(omsp_dbg_i2c_sda_in), .IO(PMOD1_P3));
|
IBUF PMOD1_P4_PIN ( .O(omsp0_dbg_i2c_scl), .I (PMOD1_P4));
|
IBUF PMOD1_P4_PIN ( .O(omsp_dbg_i2c_scl), .I (PMOD1_P4));
|
IOBUF PMOD1_P7_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD1_P7));
|
IOBUF PMOD1_P7_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD1_P7));
|
IBUF PMOD1_P8_PIN ( .O(), .I (PMOD1_P8));
|
IBUF PMOD1_P8_PIN ( .O(), .I (PMOD1_P8));
|
IOBUF PMOD1_P9_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD1_P9));
|
IOBUF PMOD1_P9_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD1_P9));
|
IOBUF PMOD1_P10_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD1_P10));
|
IOBUF PMOD1_P10_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD1_P10));
|
`endif
|
|
|
|
// Connector J4
|
// Connector J4
|
IOBUF PMOD2_P1_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD2_P1));
|
IOBUF PMOD2_P1_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD2_P1));
|
IOBUF PMOD2_P2_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD2_P2));
|
IOBUF PMOD2_P2_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD2_P2));
|
IOBUF PMOD2_P3_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD2_P3));
|
IOBUF PMOD2_P3_PIN (.T(1'b0), .I(1'b0), .O(), .IO(PMOD2_P3));
|
Line 747... |
Line 843... |
.CONTROL0 (chipscope_control)
|
.CONTROL0 (chipscope_control)
|
);
|
);
|
|
|
|
|
assign chipscope_trigger[0] = 1'b0;
|
assign chipscope_trigger[0] = 1'b0;
|
assign chipscope_trigger[1] = omsp0_dbg_uart_rxd;
|
assign chipscope_trigger[1] = 1'b0;
|
assign chipscope_trigger[2] = omsp0_dbg_uart_txd;
|
assign chipscope_trigger[2] = 1'b0;
|
assign chipscope_trigger[23:3] = 21'h00_0000;
|
assign chipscope_trigger[23:3] = 21'h00_0000;
|
`endif
|
`endif
|
|
|
endmodule // openMSP430_fpga
|
endmodule // openMSP430_fpga
|
|
|