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Rev 181 |
Line 297... |
Line 297... |
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//-----------------------------------
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//-----------------------------------
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// Pulse capture and synchronization
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// Pulse capture and synchronization
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//-----------------------------------
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//-----------------------------------
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`ifdef SYNC_NMI
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`ifdef SYNC_NMI
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`ifdef ASIC
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`ifdef ASIC_CLOCKING
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// Glitch free reset for the event capture
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// Glitch free reset for the event capture
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reg nmi_capture_rst;
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reg nmi_capture_rst;
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always @(posedge mclk or posedge puc_rst)
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always @(posedge mclk or posedge puc_rst)
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if (puc_rst) nmi_capture_rst <= 1'b1;
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if (puc_rst) nmi_capture_rst <= 1'b1;
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else nmi_capture_rst <= ifg1_wr & ~ifg1_nxt[4];
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else nmi_capture_rst <= ifg1_wr & ~ifg1_nxt[4];
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Line 349... |
Line 349... |
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// NMI pending
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// NMI pending
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wire nmi_pnd = nmiifg & nmie;
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wire nmi_pnd = nmiifg & nmie;
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// NMI wakeup
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// NMI wakeup
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`ifdef ASIC
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`ifdef ASIC_CLOCKING
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wire nmi_wkup;
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wire nmi_wkup;
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omsp_and_gate and_nmi_wkup (.y(nmi_wkup), .a(nmi_capture ^ nmi_dly), .b(nmie));
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omsp_and_gate and_nmi_wkup (.y(nmi_wkup), .a(nmi_capture ^ nmi_dly), .b(nmie));
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`else
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`else
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wire nmi_wkup = 1'b0;
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wire nmi_wkup = 1'b0;
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`endif
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`endif
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