URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [rtl/] [verilog/] [openmsp430/] [openMSP430.v] - Diff between revs 157 and 176

Rev 157	Rev 176
Line 578...	Line 578...
`.dbg_uart_rxd (dbg_uart_rxd), // Debug interface: UART RXD (asynchronous)`	`.dbg_uart_rxd (dbg_uart_rxd), // Debug interface: UART RXD (asynchronous)`
`.decode_noirq (decode_noirq), // Frontend decode instruction`	`.decode_noirq (decode_noirq), // Frontend decode instruction`
`.eu_mab (eu_mab), // Execution-Unit Memory address bus`	`.eu_mab (eu_mab), // Execution-Unit Memory address bus`
`.eu_mb_en (eu_mb_en), // Execution-Unit Memory bus enable`	`.eu_mb_en (eu_mb_en), // Execution-Unit Memory bus enable`
`.eu_mb_wr (eu_mb_wr), // Execution-Unit Memory bus write transfer`	`.eu_mb_wr (eu_mb_wr), // Execution-Unit Memory bus write transfer`
`.eu_mdb_in (eu_mdb_in), // Memory data bus input`
`.eu_mdb_out (eu_mdb_out), // Memory data bus output`
`.exec_done (exec_done), // Execution completed`
`.fe_mb_en (fe_mb_en), // Frontend Memory bus enable`
`.fe_mdb_in (fe_mdb_in), // Frontend Memory data bus input`	`.fe_mdb_in (fe_mdb_in), // Frontend Memory data bus input`
`.pc (pc), // Program counter`	`.pc (pc), // Program counter`
`.puc_pnd_set (puc_pnd_set) // PUC pending set for the serial debug interface`	`.puc_pnd_set (puc_pnd_set) // PUC pending set for the serial debug interface`
`);`	`);`