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Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [synthesis/] [xilinx/] [scripts/] [memory.bmm] - Diff between revs 157 and 167

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Rev 157	Rev 167
Line 1...	Line 1...
`ADDRESS_SPACE blockrom RAMB16 [0x0000:0x0fff]`	`ADDRESS_SPACE blockrom COMBINED [0x0000:0x3fff]`

	`ADDRESS_RANGE RAMB16 /* 0x0000 - 0x0FFF */`
`BUS_BLOCK`	`BUS_BLOCK`
	`ram_16x8k_dp_pmem_shared/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[4].ram.r/s6_noinit.ram/TRUE_DP.PRIM18.ram [15:8] LOC = X0Y18;`
	`ram_16x8k_dp_pmem_shared/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s6_noinit.ram/TRUE_DP.PRIM18.ram [7:0] LOC = X0Y10;`
	`END_BUS_BLOCK;`
	`END_ADDRESS_RANGE;`

`ram_16x2k_pmem/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[1].ram.r/s6_noinit.ram/SP.SIMPLE_PRIM18.ram [7:0] LOC = X0Y22;`	`ADDRESS_RANGE RAMB16 /* 0x1000 - 0x1FFF */`
`ram_16x2k_pmem/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/s6_noinit.ram/SP.SIMPLE_PRIM18.ram [15:8] LOC = X0Y20;`	`BUS_BLOCK`
	`ram_16x8k_dp_pmem_shared/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[5].ram.r/s6_noinit.ram/TRUE_DP.PRIM18.ram [15:8] LOC = X0Y24;`
	`ram_16x8k_dp_pmem_shared/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[1].ram.r/s6_noinit.ram/TRUE_DP.PRIM18.ram [7:0] LOC = X0Y16;`
	`END_BUS_BLOCK;`
	`END_ADDRESS_RANGE;`

	`ADDRESS_RANGE RAMB16 /* 0x2000 - 0x2FFF */`
	`BUS_BLOCK`
	`ram_16x8k_dp_pmem_shared/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[6].ram.r/s6_noinit.ram/TRUE_DP.PRIM18.ram [15:8] LOC = X0Y22;`
	`ram_16x8k_dp_pmem_shared/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[2].ram.r/s6_noinit.ram/TRUE_DP.PRIM18.ram [7:0] LOC = X0Y14;`
	`END_BUS_BLOCK;`
	`END_ADDRESS_RANGE;`

	`ADDRESS_RANGE RAMB16 /* 0x3000 - 0x3FFF */`
	`BUS_BLOCK`
	`ram_16x8k_dp_pmem_shared/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[7].ram.r/s6_noinit.ram/TRUE_DP.PRIM18.ram [15:8] LOC = X0Y20;`
	`ram_16x8k_dp_pmem_shared/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[3].ram.r/s6_noinit.ram/TRUE_DP.PRIM18.ram [7:0] LOC = X0Y12;`
`END_BUS_BLOCK;`	`END_BUS_BLOCK;`
	`END_ADDRESS_RANGE;`

`END_ADDRESS_SPACE;`	`END_ADDRESS_SPACE;`

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Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [synthesis/] [xilinx/] [scripts/] [memory.bmm] - Diff between revs 157 and 167