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Line 29... |
//
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//
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// *Author(s):
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// *Author(s):
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// - Olivier Girard, olgirard@gmail.com
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// - Olivier Girard, olgirard@gmail.com
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//
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//
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// $Rev: 23 $
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// $Rev: 94 $
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// $LastChangedBy: olivier.girard $
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// $LastChangedBy: olivier.girard $
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// $LastChangedDate: 2009-08-30 18:39:26 +0200 (Sun, 30 Aug 2009) $
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// $LastChangedDate: 2011-02-24 21:33:35 +0100 (Thu, 24 Feb 2011) $
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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`include "timescale.v"
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`include "timescale.v"
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`include "openMSP430_defines.v"
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`include "openMSP430_defines.v"
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module msp_debug (
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module msp_debug (
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Line 84... |
Line 84... |
input [3:0] space;
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input [3:0] space;
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integer i,j;
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integer i,j;
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begin
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begin
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myFormat = 0;
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myFormat = 0;
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`ifdef VXL // no +:
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`else
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j = 0;
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j = 0;
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for ( i=0; i < 32; i=i+1) // Copy string2
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for ( i=0; i < 32; i=i+1) // Copy string2
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begin
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begin
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myFormat[8*i +: 8] = string2[8*i +: 8];
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myFormat[8*i +: 8] = string2[8*i +: 8];
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if ((string2[8*i +: 8] == 0) && (j == 0)) j=i;
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if ((string2[8*i +: 8] == 0) && (j == 0)) j=i;
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Line 99... |
myFormat[8*(j+i) +: 8] = " ";
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myFormat[8*(j+i) +: 8] = " ";
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j=j+space;
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j=j+space;
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for ( i=0; i < 32; i=i+1) // Copy string1
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for ( i=0; i < 32; i=i+1) // Copy string1
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myFormat[8*(j+i) +: 8] = string1[8*i +: 8];
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myFormat[8*(j+i) +: 8] = string1[8*i +: 8];
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`endif
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end
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end
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endfunction
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endfunction
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//=============================================================================
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//=============================================================================
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// 2) CONNECTIONS TO MSP430 CORE INTERNALS
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// 2) CONNECTIONS TO MSP430 CORE INTERNALS
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//=============================================================================
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//=============================================================================
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wire [2:0] i_state_bin = dut.openMSP430_0.frontend_0.i_state;
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wire [2:0] i_state_bin = tb_openMSP430_fpga.dut.openMSP430_0.frontend_0.i_state;
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wire [3:0] e_state_bin = dut.openMSP430_0.frontend_0.e_state;
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wire [3:0] e_state_bin = tb_openMSP430_fpga.dut.openMSP430_0.frontend_0.e_state;
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wire decode = dut.openMSP430_0.frontend_0.decode;
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wire decode = tb_openMSP430_fpga.dut.openMSP430_0.frontend_0.decode;
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wire [15:0] ir = dut.openMSP430_0.frontend_0.ir;
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wire [15:0] ir = tb_openMSP430_fpga.dut.openMSP430_0.frontend_0.ir;
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wire irq_detect = dut.openMSP430_0.frontend_0.irq_detect;
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wire irq_detect = tb_openMSP430_fpga.dut.openMSP430_0.frontend_0.irq_detect;
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wire [3:0] irq_num = dut.openMSP430_0.frontend_0.irq_num;
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wire [3:0] irq_num = tb_openMSP430_fpga.dut.openMSP430_0.frontend_0.irq_num;
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wire [15:0] pc = dut.openMSP430_0.frontend_0.pc;
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wire [15:0] pc = tb_openMSP430_fpga.dut.openMSP430_0.frontend_0.pc;
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//=============================================================================
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//=============================================================================
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// 3) GENERATE DEBUG SIGNALS
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// 3) GENERATE DEBUG SIGNALS
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//=============================================================================
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//=============================================================================
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Line 410... |
Line 412... |
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// Currently executed instruction
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// Currently executed instruction
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//================================
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//================================
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wire [32*8-1:0] inst_short = inst_name;
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wire [8*32-1:0] inst_short = inst_name;
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reg [32*8-1:0] inst_full;
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reg [8*32-1:0] inst_full;
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always @(inst_type or inst_name or inst_bw or inst_as or inst_ad)
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always @(inst_type or inst_name or inst_bw or inst_as or inst_ad)
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begin
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begin
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inst_full = myFormat(inst_name, inst_bw, 0);
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inst_full = myFormat(inst_name, inst_bw, 0);
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inst_full = myFormat(inst_full, inst_as, 1);
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inst_full = myFormat(inst_full, inst_as, 1);
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if (inst_type=="TWO-OP")
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if (inst_type=="TWO-OP")
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