URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [bench/] [verilog/] [tb_openMSP430_fpga.v] - Diff between revs 104 and 111

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Rev 104	Rev 111
Line 29...	Line 29...
`//`	`//`
`// *Author(s):`	`// *Author(s):`
`// - Olivier Girard, olgirard@gmail.com`	`// - Olivier Girard, olgirard@gmail.com`
`//`	`//`
`//----------------------------------------------------------------------------`	`//----------------------------------------------------------------------------`
`// $Rev: 104 $`	`// $Rev: 111 $`
`// $LastChangedBy: olivier.girard $`	`// $LastChangedBy: olivier.girard $`
`// $LastChangedDate: 2011-03-06 21:02:27 +0100 (Sun, 06 Mar 2011) $`	`// $LastChangedDate: 2011-05-20 22:39:02 +0200 (Fri, 20 May 2011) $`
`//----------------------------------------------------------------------------`	`//----------------------------------------------------------------------------`
`include "timescale.v"	`include "timescale.v"
`ifdef OMSP_NO_INCLUDE	`ifdef OMSP_NO_INCLUDE
`else	`else
`include "openMSP430_defines.v"	`include "openMSP430_defines.v"
Line 316...	Line 316...
`.inst_pc (inst_pc), // Instruction Program counter`	`.inst_pc (inst_pc), // Instruction Program counter`
`.inst_short (inst_short), // Currently executed instruction (short version)`	`.inst_short (inst_short), // Currently executed instruction (short version)`

`// INPUTs`	`// INPUTs`
`.mclk (mclk), // Main system clock`	`.mclk (mclk), // Main system clock`
`.puc (puc) // Main system reset`	`.puc_rst (puc_rst) // Main system reset`
`);`	`);`

`//`	`//`
`// Generate Waveform`	`// Generate Waveform`
`//----------------------------------------`	`//----------------------------------------`

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Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [bench/] [verilog/] [tb_openMSP430_fpga.v] - Diff between revs 104 and 111