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//
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//
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// *Author(s):
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// *Author(s):
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// - Olivier Girard, olgirard@gmail.com
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// - Olivier Girard, olgirard@gmail.com
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//
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//
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// $Rev: 136 $
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// $Rev: 155 $
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// $LastChangedBy: olivier.girard $
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// $LastChangedBy: olivier.girard $
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// $LastChangedDate: 2012-03-22 22:14:16 +0100 (Thu, 22 Mar 2012) $
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// $LastChangedDate: 2012-10-15 23:35:05 +0200 (Mon, 15 Oct 2012) $
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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`include "openMSP430_defines.v"
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`include "openMSP430_defines.v"
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module openMSP430_fpga (
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module openMSP430_fpga (
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// OUTPUTs
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// OUTPUTs
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.aclk (), // ASIC ONLY: ACLK
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.aclk (), // ASIC ONLY: ACLK
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.aclk_en (aclk_en), // FPGA ONLY: ACLK enable
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.aclk_en (aclk_en), // FPGA ONLY: ACLK enable
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.dbg_freeze (dbg_freeze), // Freeze peripherals
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.dbg_freeze (dbg_freeze), // Freeze peripherals
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.dbg_i2c_sda_out (), // Debug interface: I2C SDA OUT
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.dbg_uart_txd (dbg_uart_txd), // Debug interface: UART TXD
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.dbg_uart_txd (dbg_uart_txd), // Debug interface: UART TXD
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.dco_enable (), // ASIC ONLY: Fast oscillator enable
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.dco_enable (), // ASIC ONLY: Fast oscillator enable
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.dco_wkup (), // ASIC ONLY: Fast oscillator wake-up (asynchronous)
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.dco_wkup (), // ASIC ONLY: Fast oscillator wake-up (asynchronous)
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.dmem_addr (dmem_addr), // Data Memory address
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.dmem_addr (dmem_addr), // Data Memory address
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.dmem_cen (dmem_cen), // Data Memory chip enable (low active)
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.dmem_cen (dmem_cen), // Data Memory chip enable (low active)
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.smclk_en (smclk_en), // FPGA ONLY: SMCLK enable
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.smclk_en (smclk_en), // FPGA ONLY: SMCLK enable
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// INPUTs
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// INPUTs
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.cpu_en (1'b1), // Enable CPU code execution (asynchronous and non-glitchy)
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.cpu_en (1'b1), // Enable CPU code execution (asynchronous and non-glitchy)
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.dbg_en (1'b1), // Debug interface enable (asynchronous and non-glitchy)
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.dbg_en (1'b1), // Debug interface enable (asynchronous and non-glitchy)
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.dbg_i2c_addr (7'h00), // Debug interface: I2C Address
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.dbg_i2c_broadcast (7'h00), // Debug interface: I2C Broadcast Address (for multicore systems)
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.dbg_i2c_scl (1'b1), // Debug interface: I2C SCL
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.dbg_i2c_sda_in (1'b1), // Debug interface: I2C SDA IN
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.dbg_uart_rxd (dbg_uart_rxd), // Debug interface: UART RXD (asynchronous)
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.dbg_uart_rxd (dbg_uart_rxd), // Debug interface: UART RXD (asynchronous)
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.dco_clk (clk_sys), // Fast oscillator (fast clock)
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.dco_clk (clk_sys), // Fast oscillator (fast clock)
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.dmem_dout (dmem_dout), // Data Memory data output
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.dmem_dout (dmem_dout), // Data Memory data output
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.irq (irq_bus), // Maskable interrupts
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.irq (irq_bus), // Maskable interrupts
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.lfxt_clk (1'b0), // Low frequency oscillator (typ 32kHz)
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.lfxt_clk (1'b0), // Low frequency oscillator (typ 32kHz)
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