| Line 29... |
Line 29... |
//
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//
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// *Author(s):
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// *Author(s):
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// - Olivier Girard, olgirard@gmail.com
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// - Olivier Girard, olgirard@gmail.com
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//
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//
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// $Rev: 104 $
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// $Rev: 105 $
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// $LastChangedBy: olivier.girard $
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// $LastChangedBy: olivier.girard $
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// $LastChangedDate: 2011-03-06 21:02:27 +0100 (Sun, 06 Mar 2011) $
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// $LastChangedDate: 2011-03-10 22:10:30 +0100 (Thu, 10 Mar 2011) $
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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`ifdef OMSP_NO_INCLUDE
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`ifdef OMSP_NO_INCLUDE
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`else
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`else
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`include "openMSP430_defines.v"
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`include "openMSP430_defines.v"
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`endif
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`endif
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| Line 67... |
Line 67... |
inst_bw, // Decoded Inst: byte width
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inst_bw, // Decoded Inst: byte width
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inst_dest, // Decoded Inst: destination (one hot)
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inst_dest, // Decoded Inst: destination (one hot)
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inst_dext, // Decoded Inst: destination extended instruction word
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inst_dext, // Decoded Inst: destination extended instruction word
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inst_irq_rst, // Decoded Inst: reset interrupt
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inst_irq_rst, // Decoded Inst: reset interrupt
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inst_jmp, // Decoded Inst: Conditional jump
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inst_jmp, // Decoded Inst: Conditional jump
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inst_mov, // Decoded Inst: mov instruction
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inst_sext, // Decoded Inst: source extended instruction word
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inst_sext, // Decoded Inst: source extended instruction word
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inst_so, // Decoded Inst: Single-operand arithmetic
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inst_so, // Decoded Inst: Single-operand arithmetic
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inst_src, // Decoded Inst: source (one hot)
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inst_src, // Decoded Inst: source (one hot)
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inst_type, // Decoded Instruction type
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inst_type, // Decoded Instruction type
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mclk, // Main system clock
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mclk, // Main system clock
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| Line 107... |
Line 108... |
input inst_bw; // Decoded Inst: byte width
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input inst_bw; // Decoded Inst: byte width
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input [15:0] inst_dest; // Decoded Inst: destination (one hot)
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input [15:0] inst_dest; // Decoded Inst: destination (one hot)
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input [15:0] inst_dext; // Decoded Inst: destination extended instruction word
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input [15:0] inst_dext; // Decoded Inst: destination extended instruction word
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input inst_irq_rst; // Decoded Inst: reset interrupt
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input inst_irq_rst; // Decoded Inst: reset interrupt
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input [7:0] inst_jmp; // Decoded Inst: Conditional jump
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input [7:0] inst_jmp; // Decoded Inst: Conditional jump
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input inst_mov; // Decoded Inst: mov instruction
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input [15:0] inst_sext; // Decoded Inst: source extended instruction word
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input [15:0] inst_sext; // Decoded Inst: source extended instruction word
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input [7:0] inst_so; // Decoded Inst: Single-operand arithmetic
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input [7:0] inst_so; // Decoded Inst: Single-operand arithmetic
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input [15:0] inst_src; // Decoded Inst: source (one hot)
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input [15:0] inst_src; // Decoded Inst: source (one hot)
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input [2:0] inst_type; // Decoded Instruction type
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input [2:0] inst_type; // Decoded Instruction type
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input mclk; // Main system clock
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input mclk; // Main system clock
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| Line 316... |
Line 318... |
assign mb_en = ((e_state==`E_IRQ_1) & ~inst_irq_rst) |
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assign mb_en = ((e_state==`E_IRQ_1) & ~inst_irq_rst) |
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((e_state==`E_IRQ_3) & ~inst_irq_rst) |
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((e_state==`E_IRQ_3) & ~inst_irq_rst) |
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((e_state==`E_SRC_RD) & ~inst_as[`IMM]) |
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((e_state==`E_SRC_RD) & ~inst_as[`IMM]) |
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(e_state==`E_SRC_WR) |
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(e_state==`E_SRC_WR) |
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((e_state==`E_EXEC) & inst_so[`RETI]) |
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((e_state==`E_EXEC) & inst_so[`RETI]) |
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(e_state==`E_DST_RD) |
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((e_state==`E_DST_RD) & ~inst_type[`INST_SO]
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& ~inst_mov) |
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(e_state==`E_DST_WR);
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(e_state==`E_DST_WR);
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|
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wire [1:0] mb_wr_msk = inst_alu[`EXEC_NO_WR] ? 2'b00 :
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wire [1:0] mb_wr_msk = inst_alu[`EXEC_NO_WR] ? 2'b00 :
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~inst_bw ? 2'b11 :
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~inst_bw ? 2'b11 :
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alu_out_add[0] ? 2'b10 : 2'b01;
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alu_out_add[0] ? 2'b10 : 2'b01;
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