URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [rtl/] [verilog/] [openmsp430/] [periph/] [template_periph_16b.v] - Diff between revs 74 and 104

Rev 74	Rev 104
Line 34...	Line 34...
`//`	`//`
`// *Author(s):`	`// *Author(s):`
`// - Olivier Girard, olgirard@gmail.com`	`// - Olivier Girard, olgirard@gmail.com`
`//`	`//`
`//----------------------------------------------------------------------------`	`//----------------------------------------------------------------------------`
`// $Rev: 74 $`	`// $Rev: 104 $`
`// $LastChangedBy: olivier.girard $`	`// $LastChangedBy: olivier.girard $`
`// $LastChangedDate: 2010-08-28 21:53:08 +0200 (Sat, 28 Aug 2010) $`	`// $LastChangedDate: 2011-03-06 21:02:27 +0100 (Sun, 06 Mar 2011) $`
`//----------------------------------------------------------------------------`	`//----------------------------------------------------------------------------`
`include "timescale.v"	`ifdef OMSP_NO_INCLUDE
	`else
`include "openMSP430_defines.v"	`include "openMSP430_defines.v"
	`endif

`module template_periph_16b (`	`module template_periph_16b (`

`// OUTPUTs`	`// OUTPUTs`
`per_dout, // Peripheral data output`	`per_dout, // Peripheral data output`
Line 177...	Line 179...
`cntrl4_rd;`	`cntrl4_rd;`


`endmodule // template_periph_16b`	`endmodule // template_periph_16b`

	`ifdef OMSP_NO_INCLUDE
	`else
`include "openMSP430_undefines.v"	`include "openMSP430_undefines.v"
	`endif

`No newline at end of file`	`No newline at end of file`