| Line 26... |
Line 26... |
//
|
//
|
// Author(s):
|
// Author(s):
|
// - Olivier Girard, olgirard@gmail.com
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// - Olivier Girard, olgirard@gmail.com
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//
|
//
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//-----------------------------------------------------------------------------
|
//-----------------------------------------------------------------------------
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// $Rev: 37 $
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// $Rev: 71 $
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// $LastChangedBy: olivier.girard $
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// $LastChangedBy: olivier.girard $
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// $LastChangedDate: 2009-12-29 21:58:14 +0100 (Tue, 29 Dec 2009) $
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// $LastChangedDate: 2010-03-07 21:14:33 +0100 (Sun, 07 Mar 2010) $
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//=============================================================================
|
//=============================================================================
|
|
|
//=============================================================================
|
//=============================================================================
|
// Xilinx library
|
// Xilinx library
|
//=============================================================================
|
//=============================================================================
|
| Line 72... |
Line 72... |
../../../rtl/verilog/openmsp430/omsp_sfr.v
|
../../../rtl/verilog/openmsp430/omsp_sfr.v
|
../../../rtl/verilog/openmsp430/omsp_dbg.v
|
../../../rtl/verilog/openmsp430/omsp_dbg.v
|
../../../rtl/verilog/openmsp430/omsp_dbg_hwbrk.v
|
../../../rtl/verilog/openmsp430/omsp_dbg_hwbrk.v
|
../../../rtl/verilog/openmsp430/omsp_dbg_uart.v
|
../../../rtl/verilog/openmsp430/omsp_dbg_uart.v
|
../../../rtl/verilog/openmsp430/omsp_watchdog.v
|
../../../rtl/verilog/openmsp430/omsp_watchdog.v
|
|
../../../rtl/verilog/openmsp430/omsp_multiplier.v
|
../../../rtl/verilog/openmsp430/periph/omsp_gpio.v
|
../../../rtl/verilog/openmsp430/periph/omsp_gpio.v
|
../../../rtl/verilog/openmsp430/periph/omsp_timerA.v
|
../../../rtl/verilog/openmsp430/periph/omsp_timerA.v
|
|
|
|
|
//=============================================================================
|
//=============================================================================
|
