| Line 2... |
Line 2... |
/* DIGITAL I/O */
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/* DIGITAL I/O */
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* Test the Digital I/O interface. */
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/* Test the Digital I/O interface. */
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/*===========================================================================*/
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/*===========================================================================*/
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reg [32*8-1:0] rx_chain;
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`define VERY_LONG_TIMEOUT
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integer rx_offset;
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// Data rate
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parameter UART_FREQ = 115200;
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integer UART_PERIOD = 1000000000/UART_FREQ;
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reg [7:0] rxbuf;
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reg [7:0] rxbuf;
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integer rxcnt;
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integer rxcnt;
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`define BAUD 140
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task uart_rx;
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task uart_rx;
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begin
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begin
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@(negedge UART_TXD);
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@(negedge UART_TXD);
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rxbuf = 0;
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rxbuf = 0;
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repeat(`BAUD*3/2) @(posedge mclk);
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#(UART_PERIOD*3/2);
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for (rxcnt = 0; rxcnt < 8; rxcnt = rxcnt + 1)
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for (rxcnt = 0; rxcnt < 8; rxcnt = rxcnt + 1)
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begin
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begin
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rxbuf = {UART_TXD, rxbuf[7:1]};
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rxbuf = {UART_TXD, rxbuf[7:1]};
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repeat(`BAUD) @(posedge mclk);
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#(UART_PERIOD);
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end
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end
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$write("%s", rxbuf);
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$fflush();
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end
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end
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endtask
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endtask
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task uart_tx;
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task uart_tx;
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input [7:0] txbuf;
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input [7:0] txbuf;
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| Line 31... |
Line 35... |
reg [9:0] txbuf_full;
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reg [9:0] txbuf_full;
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integer txcnt;
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integer txcnt;
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begin
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begin
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UART_RXD = 1'b1;
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UART_RXD = 1'b1;
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txbuf_full = {1'b1, txbuf, 1'b0};
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txbuf_full = {1'b1, txbuf, 1'b0};
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repeat(`BAUD) @(posedge mclk);
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#(UART_PERIOD);
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for (txcnt = 0; txcnt < 10; txcnt = txcnt + 1)
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for (txcnt = 0; txcnt < 10; txcnt = txcnt + 1)
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begin
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begin
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UART_RXD = txbuf_full[txcnt];
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UART_RXD = txbuf_full[txcnt];
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// txbuf_full = {txbuf_full[8:1], 1'b0};
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#(UART_PERIOD);
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repeat(`BAUD) @(posedge mclk);
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end
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end
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end
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end
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endtask
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endtask
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initial forever uart_rx;
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initial
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initial
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begin
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begin
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$display(" ===============================================");
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$display(" ===============================================");
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$display("| START SIMULATION |");
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$display("| START SIMULATION |");
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$display(" ===============================================");
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$display(" ===============================================");
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repeat(5) @(posedge CLK_50MHz);
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repeat(5) @(posedge CLK_50MHz);
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stimulus_done = 0;
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stimulus_done = 0;
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rx_chain = 0;
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rx_offset = 0;
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|
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while (rx_offset<1)
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begin
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uart_rx;
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rx_chain = rx_chain | (rxbuf << (31*8-(8*rx_offset)));
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rx_offset = rx_offset+1;
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end
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repeat(50) @(posedge CLK_50MHz);
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uart_tx("a");
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// repeat(5000) @(posedge mclk);
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UART_RXD = 1'b1;
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// UART_RXD = 1;
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// repeat(160) @(posedge mclk);
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// UART_RXD = 0;
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// repeat(160) @(posedge mclk);
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// UART_RXD = 1;
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// repeat(160) @(posedge mclk);
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// UART_RXD = 0;
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// repeat(160) @(posedge mclk);
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// UART_RXD = 1;
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// repeat(160) @(posedge mclk);
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// UART_RXD = 0;
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// repeat(160) @(posedge mclk);
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// UART_RXD = 1;
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// repeat(160) @(posedge mclk);
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// UART_RXD = 0;
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// repeat(160) @(posedge mclk);
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|
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// Select GPIOs (for software uart)
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SW1 = 1'b0;
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SW0 = 1'b1;
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|
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// Wait for welcome message to be received
|
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repeat(125000) @(posedge mclk);
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|
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// Send something
|
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uart_tx("B");
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repeat(3000) @(posedge mclk);
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uart_tx("o");
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repeat(3000) @(posedge mclk);
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uart_tx("n");
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repeat(3000) @(posedge mclk);
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uart_tx("j");
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repeat(3000) @(posedge mclk);
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uart_tx("o");
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repeat(3000) @(posedge mclk);
|
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uart_tx("u");
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repeat(3000) @(posedge mclk);
|
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uart_tx("r");
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repeat(3000) @(posedge mclk);
|
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uart_tx(" ");
|
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repeat(3000) @(posedge mclk);
|
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uart_tx(":");
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repeat(3000) @(posedge mclk);
|
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uart_tx("-");
|
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repeat(3000) @(posedge mclk);
|
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uart_tx(")");
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repeat(3000) @(posedge mclk);
|
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uart_tx("\n");
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repeat(3000) @(posedge mclk);
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|
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stimulus_done = 1;
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stimulus_done = 1;
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//repeat(1000) @(posedge mclk);
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repeat(10) @(posedge mclk);
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//$finish();
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$display("\n");
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$finish();
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end
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end
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No newline at end of file
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No newline at end of file
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