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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [software/] [ta_uart/] [fll.s] - Diff between revs 28 and 143

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Rev 28 Rev 143
Line 30... Line 30...
.LfllDN:cmp.b   #DCOCTL_MIN, r13        ; Needs Rsel to be decreased ?
.LfllDN:cmp.b   #DCOCTL_MIN, r13        ; Needs Rsel to be decreased ?
        jne     .LfllCP                 ; No
        jne     .LfllCP                 ; No
        cmp.b   #0, r14                 ; Is min Rsel already selected ?
        cmp.b   #0, r14                 ; Is min Rsel already selected ?
        jeq     .LfllER                 ; Yes, Rsel can not be increased
        jeq     .LfllER                 ; Yes, Rsel can not be increased
        dec.b   &BCSCTL1                ; Decrease Rsel
        dec.b   &BCSCTL1                ; Decrease Rsel
.LfllRx:mov.b   #60h, &DCOCTL           ; Center DCO (may be optimized later ?)
.LfllRx:
 
        mov.b   #60h, &DCOCTL           ; Center DCO (may be optimized later ?)
        jmp     .Lwait0                 ; Test DCO again
        jmp     .Lwait0                 ; Test DCO again
.LfllCP:
.LfllCP:
        mov     &CCR2, r12              ; Read captured value
        mov     &CCR2, r12              ; Read captured value
        sub     r15, r12                ; Subtract last captured value
        sub     r15, r12                ; Subtract last captured value
        mov     &CCR2, r15              ; Store CCR2 value for next pass
        mov     &CCR2, r15              ; Store CCR2 value for next pass

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