OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [tools/] [lib/] [tcl-lib/] [dbg_functions.tcl] - Diff between revs 77 and 87

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 77 Rev 87
Line 26... Line 26...
#
#
# Author(s):
# Author(s):
#             - Olivier Girard,    olgirard@gmail.com
#             - Olivier Girard,    olgirard@gmail.com
#
#
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# $Rev: 77 $
# $Rev: 87 $
# $LastChangedBy: olivier.girard $
# $LastChangedBy: olivier.girard $
# $LastChangedDate: 2010-11-21 20:50:55 +0100 (Sun, 21 Nov 2010) $
# $LastChangedDate: 2011-02-05 14:40:22 +0100 (Sat, 05 Feb 2011) $
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
#
#
# Description: Main utility functions for the openMSP430 serial debug
# Description: Main utility functions for the openMSP430 serial debug
#             interface.
#             interface.
#
#
Line 218... Line 218...
 
 
    # Get number of hardware breakpoints
    # Get number of hardware breakpoints
    set hw_break(num) [InitBreakUnits]
    set hw_break(num) [InitBreakUnits]
 
 
    # Check CPU ID
    # Check CPU ID
    if {[VerifyCPU_ID]} {
    return [VerifyCPU_ID]
        return 1
 
    } else {
 
        return 0
 
    }
 
}
}
 
 
#=============================================================================#
#=============================================================================#
# ReleaseDevice (Addr)                                                        #
# ReleaseDevice (Addr)                                                        #
#-----------------------------------------------------------------------------#
#-----------------------------------------------------------------------------#
Line 456... Line 452...
# Result     : Return "ROM_SIZE RAM_SIZE" in byte.                            #
# Result     : Return "ROM_SIZE RAM_SIZE" in byte.                            #
#=============================================================================#
#=============================================================================#
proc GetCPU_ID_SIZE {} {
proc GetCPU_ID_SIZE {} {
 
 
    set cpu_id_full [GetCPU_ID]
    set cpu_id_full [GetCPU_ID]
    regexp {(....)(....)$} $cpu_id_full match rom_width ram_width
    regexp {(....)(....)$} $cpu_id_full match rom_size ram_size
 
 
    set rom_size [expr 0x$rom_width]
    if {[info exists rom_size]} {
    set ram_size [expr 0x$ram_width]
        set rom_size [expr 0x$rom_size]
 
    } else {
 
        set rom_size -1
 
    }
 
    if {[info exists ram_size]} {
 
        set ram_size [expr 0x$ram_size]
 
    } else {
 
        set ram_size -1
 
    }
 
 
    return "$rom_size $ram_size"
    return "$rom_size $ram_size"
}
}
 
 
#=============================================================================#
#=============================================================================#
Line 475... Line 479...
#=============================================================================#
#=============================================================================#
proc VerifyCPU_ID {} {
proc VerifyCPU_ID {} {
 
 
    set cpu_id_full [GetCPU_ID]
    set cpu_id_full [GetCPU_ID]
 
 
    if {[string eq "0x00000000" $cpu_id_full]} {
    if {[string eq "0x00000000" $cpu_id_full] | [string eq "0x" $cpu_id_full]} {
        set result 0
        set result 0
    } else {
    } else {
        set result 1
        set result 1
    }
    }
    return $result
    return $result
Line 646... Line 650...
#=============================================================================#
#=============================================================================#
proc EraseRAM {} {
proc EraseRAM {} {
 
 
    set ram_size [lindex [GetCPU_ID_SIZE] 1]
    set ram_size [lindex [GetCPU_ID_SIZE] 1]
 
 
 
    if {$ram_size!=-1} {
    set DataArray ""
    set DataArray ""
    for {set i 0} {$i<$ram_size} {incr i} {
    for {set i 0} {$i<$ram_size} {incr i} {
        lappend DataArray 0x00
        lappend DataArray 0x00
    }
    }
 
 
    WriteMemQuick8 $0x0200 $DataArray
    WriteMemQuick8 $0x0200 $DataArray
 
 
    return 1
    return 1
}
}
 
    return 0
 
}
 
 
#=============================================================================#
#=============================================================================#
# EraseROM ()                                                                 #
# EraseROM ()                                                                 #
#-----------------------------------------------------------------------------#
#-----------------------------------------------------------------------------#
# Description: Erase ROM.                                                     #
# Description: Erase ROM.                                                     #
Line 668... Line 675...
proc EraseROM {} {
proc EraseROM {} {
 
 
    set rom_size  [lindex [GetCPU_ID_SIZE] 0]
    set rom_size  [lindex [GetCPU_ID_SIZE] 0]
    set rom_start [expr 0x10000-$rom_size]
    set rom_start [expr 0x10000-$rom_size]
 
 
 
    if {$ram_size!=-1} {
    set DataArray ""
    set DataArray ""
    for {set i 0} {$i<$rom_size} {incr i} {
    for {set i 0} {$i<$rom_size} {incr i} {
        lappend DataArray 0x00
        lappend DataArray 0x00
    }
    }
 
 
    WriteMemQuick8 $rom_start $DataArray
    WriteMemQuick8 $rom_start $DataArray
 
 
    return 1
    return 1
}
}
 
    return 0
 
}
 
 
#=============================================================================#
#=============================================================================#
# InitBreakUnits()                                                            #
# InitBreakUnits()                                                            #
#-----------------------------------------------------------------------------#
#-----------------------------------------------------------------------------#
# Description: Initialize the hardware breakpoint units.                      #
# Description: Initialize the hardware breakpoint units.                      #

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.