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#----------------------------------------------------------------------------------
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# Copyright (C) 2001 Authors
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#
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# This source file may be used and distributed without restriction provided
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# that this copyright statement is not removed from the file and that any
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# derivative work contains the original copyright notice and the associated
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# disclaimer.
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#
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# This source file is free software; you can redistribute it and/or modify
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# it under the terms of the GNU Lesser General Public License as published
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# by the Free Software Foundation; either version 2.1 of the License, or
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# (at your option) any later version.
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#
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# This source is distributed in the hope that it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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# FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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# License for more details.
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#
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# You should have received a copy of the GNU Lesser General Public License
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# along with this source; if not, write to the Free Software Foundation,
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# Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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#
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#----------------------------------------------------------------------------------
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#
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# File Name: dbg_uart_generic.tcl
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#
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# Author(s):
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# - Olivier Girard, olgirard@gmail.com
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#
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#----------------------------------------------------------------------------------
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# $Rev: 158 $
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# $LastChangedBy: olivier.girard $
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# $LastChangedDate: 2012-10-15 23:49:09 +0200 (Mon, 15 Oct 2012) $
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#----------------------------------------------------------------------------------
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#
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# Description:
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#
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# Generic UART utility functions for the openMSP430 serial debug interface.
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#
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# Mandatory Public functions:
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#
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# - uart_generic::dbg_open (Device, Baudrate)
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# - uart_generic::dbg_connect (CpuAddr)
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# - uart_generic::dbg_rd (CpuAddr, RegisterName)
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# - uart_generic::dbg_wr (CpuAddr, RegisterName, Data)
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# - uart_generic::dbg_burst_rx (CpuAddr, Format, Length)
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# - uart_generic::dbg_burst_tx (CpuAddr, Format, DataList)
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# - uart_generic::get_allowed_speeds ()
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#
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#
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# Private functions:
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#
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# - uart::dbg_format_cmd (RegisterName, Action)
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#
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#----------------------------------------------------------------------------------
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namespace eval uart_generic {
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#=============================================================================#
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# Source required libraries #
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#=============================================================================#
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set scriptDir [file dirname [info script]]
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source $scriptDir/dbg_utils.tcl
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#=============================================================================#
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# uart_generic::dbg_open (Device, Baudrate) #
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#-----------------------------------------------------------------------------#
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# Description: Open and configure the UART connection. #
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# Arguments : Device - Serial port device (i.e. /dev/ttyS0 or COM2:) #
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# Baudrate - UART communication speed. #
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# Result : 0 if error, 1 otherwise. #
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#=============================================================================#
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proc dbg_open {Device Baudrate} {
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# Open UART interface
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if {![utils::uart_open $Device 1 $Baudrate]} {
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return 0
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}
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return 1
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}
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#=============================================================================#
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# uart_generic::dbg_connect (CpuAddr) #
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#-----------------------------------------------------------------------------#
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# Description: Send the synchronization frame in order to connect with the #
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# openMSP430 core. #
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# Arguments : CpuAddr - Unused argument for the UART interface (I2C only). #
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# Result : 0 if error, 1 otherwise. #
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#=============================================================================#
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proc dbg_connect {CpuAddr} {
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# Send synchronisation frame
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utils::uart_tx {0x80}
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after 100
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# Send dummy frame in case the debug interface is already synchronized
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utils::uart_tx {0xC0}
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utils::uart_tx {0x00}
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return 1
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}
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#=============================================================================#
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# uart_generic::dbg_rd (CpuAddr, RegisterName) #
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#-----------------------------------------------------------------------------#
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# Description: Read the specified debug register. #
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# Arguments : CpuAddr - Unused for the UART interface (I2C only). #
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# RegisterName - Name of the register to be read. #
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# Result : Register content, in hexadecimal. #
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#=============================================================================#
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proc dbg_rd {CpuAddr RegisterName} {
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# Send command frame
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set cmd [dbg_format_cmd $RegisterName RD]
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utils::uart_tx $cmd
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# Compute size of data to be received
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if [string eq [expr 0x40 & $cmd] 64] {
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set format 1
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set length 1
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} else {
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set format 0
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set length 2
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}
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# Receive data
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set rx_data [utils::uart_rx $format $length]
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return $rx_data
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}
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#=============================================================================#
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# uart_generic::dbg_wr (CpuAddr, RegisterName, Data) #
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#-----------------------------------------------------------------------------#
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# Description: Write to the specified debug register. #
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# Arguments : CpuAddr - Unused for the UART interface (I2C only). #
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# RegisterName - Name of the register to be written. #
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# Data - Data to be written. #
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# Result : 0 if error, 1 otherwise. #
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#=============================================================================#
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proc dbg_wr {CpuAddr RegisterName Data} {
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# Send command frame
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set cmd [dbg_format_cmd $RegisterName WR]
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utils::uart_tx $cmd
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# Format input data
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if {![regexp {0x} $Data match]} {
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set Data [format "0x%x" $Data]
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}
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set hex_val [format %04x $Data]
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regexp {(..)(..)} $hex_val match hex_msb hex_lsb
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# Compute size of data to be sent
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if [string eq [expr 0x40 & $cmd] 64] {
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set size 1
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} else {
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set size 2
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}
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# Send data
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utils::uart_tx "0x$hex_lsb"
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if {$size==2} {
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utils::uart_tx "0x$hex_msb"
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}
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return 1
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}
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#=============================================================================#
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# uart_generic::dbg_burst_rx (CpuAddr, Format, Length) #
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#-----------------------------------------------------------------------------#
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# Description: Receive data list as burst from the serial debug interface. #
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# Arguments : CpuAddr - Unused for the UART interface (I2C only). #
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# Format - 0 format as 16 bit word, 1 format as 8 bit word. #
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# Length - Number of byte to be received. #
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# Result : 0 if error, 1 otherwise. #
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#=============================================================================#
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proc dbg_burst_rx {CpuAddr Format Length} {
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return [utils::uart_rx $Format $Length]
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}
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#=============================================================================#
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# uart_generic::dbg_burst_tx (CpuAddr, Format, DataList) #
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#-----------------------------------------------------------------------------#
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# Description: Transmit data list as burst to the serial debug interface. #
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# Arguments : CpuAddr - Unused for the UART interface (I2C only). #
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# Format - 0 format as 16 bit word, 1 format as 8 bit word. #
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# DataList - List of data to be written (in hexadecimal). #
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# Result : 0 if error, 1 otherwise. #
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#=============================================================================#
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proc dbg_burst_tx {CpuAddr Format DataList} {
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foreach data [split $DataList] {
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if {$Format==1} { #### 8-bit data format ####
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# Format data
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set data [format %02x $data]
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# Send data
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utils::uart_tx "0x$data"
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} else { #### 16-bit data format ####
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# Format data
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set data [format %04x $data]
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regexp {(..)(..)} $data match data_msb data_lsb
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# Send data
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utils::uart_tx "0x$data_lsb 0x$data_msb"
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}
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}
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}
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#=============================================================================#
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# uart_generic::get_allowed_speeds () #
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#-----------------------------------------------------------------------------#
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# Description: Return the list of allowed UART baudrates. #
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#=============================================================================#
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proc get_allowed_speeds {} {
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# Editable Default UART-Baudrates
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return [list 1 115200 [list 9600 \
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19200 \
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38400 \
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57600 \
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115200 \
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230400 \
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460800 \
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500000 \
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576000 \
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921600 \
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1000000 \
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1152000 \
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2000000] ]
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}
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###################################################################################################
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###################################################################################################
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###################################################################################################
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###################################################################################################
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####### #######
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####### PRIVATE FUNCTIONS #######
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####### #######
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###################################################################################################
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###################################################################################################
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###################################################################################################
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###################################################################################################
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#=============================================================================#
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# uart_generic::dbg_format_cmd (RegisterName, Action) #
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#-----------------------------------------------------------------------------#
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# Description: Get the correcponding UART command to a given debug register #
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# access. #
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# Arguments : RegisterName - Name of the register to be accessed. #
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# Action - RD for read / WR for write. #
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# Result : Command to be sent via UART. #
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#=============================================================================#
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proc dbg_format_cmd {RegisterName Action} {
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switch -exact $Action {
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RD {set rd_wr "0x00"}
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WR {set rd_wr "0x080"}
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default {set rd_wr "0x00"}
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}
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switch -exact $RegisterName {
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CPU_ID_LO {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x00 | 0x00]]}
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CPU_ID_HI {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x00 | 0x01]]}
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CPU_CTL {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x40 | 0x02]]}
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CPU_STAT {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x40 | 0x03]]}
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MEM_CTL {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x40 | 0x04]]}
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MEM_ADDR {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x00 | 0x05]]}
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MEM_DATA {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x00 | 0x06]]}
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MEM_CNT {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x00 | 0x07]]}
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BRK0_CTL {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x40 | 0x08]]}
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BRK0_STAT {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x40 | 0x09]]}
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BRK0_ADDR0 {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x00 | 0x0A]]}
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BRK0_ADDR1 {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x00 | 0x0B]]}
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BRK1_CTL {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x40 | 0x0C]]}
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BRK1_STAT {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x40 | 0x0D]]}
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BRK1_ADDR0 {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x00 | 0x0E]]}
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BRK1_ADDR1 {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x00 | 0x0F]]}
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BRK2_CTL {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x40 | 0x10]]}
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BRK2_STAT {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x40 | 0x11]]}
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BRK2_ADDR0 {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x00 | 0x12]]}
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BRK2_ADDR1 {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x00 | 0x13]]}
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BRK3_CTL {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x40 | 0x14]]}
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BRK3_STAT {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x40 | 0x15]]}
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BRK3_ADDR0 {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x00 | 0x16]]}
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BRK3_ADDR1 {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x00 | 0x17]]}
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CPU_NR {set uart_cmd [format "0x%02x" [expr $rd_wr | 0x00 | 0x18]]}
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default {set uart_cmd "0x00"}
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}
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return $uart_cmd
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}
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}
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