| Line 3542... |
Line 3542... |
}
|
}
|
|
|
i2_code_number = recog_for_combine (&newi2pat, i2, &new_i2_notes);
|
i2_code_number = recog_for_combine (&newi2pat, i2, &new_i2_notes);
|
|
|
if (i2_code_number >= 0)
|
if (i2_code_number >= 0)
|
|
{
|
|
/* recog_for_combine might have added CLOBBERs to newi2pat.
|
|
Make sure NEWPAT does not depend on the clobbered regs. */
|
|
if (GET_CODE (newi2pat) == PARALLEL)
|
|
{
|
|
for (i = XVECLEN (newi2pat, 0) - 1; i >= 0; i--)
|
|
if (GET_CODE (XVECEXP (newi2pat, 0, i)) == CLOBBER)
|
|
{
|
|
rtx reg = XEXP (XVECEXP (newi2pat, 0, i), 0);
|
|
if (reg_overlap_mentioned_p (reg, newpat))
|
|
break;
|
|
}
|
|
|
|
if (i >= 0)
|
|
{
|
|
/* CLOBBERs on newi2pat prevent it going first.
|
|
Try the other order of the insns if possible. */
|
|
temp = newpat;
|
|
newpat = XVECEXP (newi2pat, 0, 0);
|
|
newi2pat = temp;
|
|
#ifdef HAVE_cc0
|
|
if (reg_referenced_p (cc0_rtx, newpat))
|
|
{
|
|
undo_all ();
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
i2_code_number = recog_for_combine (&newi2pat, i2,
|
|
&new_i2_notes);
|
|
if (i2_code_number < 0)
|
|
{
|
|
undo_all ();
|
|
return 0;
|
|
}
|
|
|
|
if (GET_CODE (newi2pat) == PARALLEL)
|
|
for (i = XVECLEN (newi2pat, 0) - 1; i >= 0; i--)
|
|
if (GET_CODE (XVECEXP (newi2pat, 0, i)) == CLOBBER)
|
|
{
|
|
rtx reg = XEXP (XVECEXP (newi2pat, 0, i), 0);
|
|
if (reg_overlap_mentioned_p (reg, newpat))
|
|
{
|
|
undo_all ();
|
|
return 0;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
insn_code_number = recog_for_combine (&newpat, i3, &new_i3_notes);
|
insn_code_number = recog_for_combine (&newpat, i3, &new_i3_notes);
|
}
|
}
|
|
}
|
|
|
/* If it still isn't recognized, fail and change things back the way they
|
/* If it still isn't recognized, fail and change things back the way they
|
were. */
|
were. */
|
if ((insn_code_number < 0
|
if ((insn_code_number < 0
|
/* Is the result a reasonable ASM_OPERANDS? */
|
/* Is the result a reasonable ASM_OPERANDS? */
|
| Line 9503... |
Line 9554... |
if (subreg_lowpart_p (varop)
|
if (subreg_lowpart_p (varop)
|
&& (GET_MODE_SIZE (GET_MODE (SUBREG_REG (varop)))
|
&& (GET_MODE_SIZE (GET_MODE (SUBREG_REG (varop)))
|
> GET_MODE_SIZE (GET_MODE (varop)))
|
> GET_MODE_SIZE (GET_MODE (varop)))
|
&& (unsigned int) ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (varop)))
|
&& (unsigned int) ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (varop)))
|
+ (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
|
+ (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
|
== mode_words)
|
== mode_words
|
|
&& GET_MODE_CLASS (GET_MODE (varop)) == MODE_INT
|
|
&& GET_MODE_CLASS (GET_MODE (SUBREG_REG (varop))) == MODE_INT)
|
{
|
{
|
varop = SUBREG_REG (varop);
|
varop = SUBREG_REG (varop);
|
if (GET_MODE_SIZE (GET_MODE (varop)) > GET_MODE_SIZE (mode))
|
if (GET_MODE_SIZE (GET_MODE (varop)) > GET_MODE_SIZE (mode))
|
mode = GET_MODE (varop);
|
mode = GET_MODE (varop);
|
continue;
|
continue;
|
| Line 12678... |
Line 12731... |
if (reg_bitfield_target_p (x, XVECEXP (body, 0, i)))
|
if (reg_bitfield_target_p (x, XVECEXP (body, 0, i)))
|
return 1;
|
return 1;
|
|
|
return 0;
|
return 0;
|
}
|
}
|
|
|
/* Return the next insn after INSN that is neither a NOTE nor a
|
|
DEBUG_INSN. This routine does not look inside SEQUENCEs. */
|
|
|
|
static rtx
|
|
next_nonnote_nondebug_insn (rtx insn)
|
|
{
|
|
while (insn)
|
|
{
|
|
insn = NEXT_INSN (insn);
|
|
if (insn == 0)
|
|
break;
|
|
if (NOTE_P (insn))
|
|
continue;
|
|
if (DEBUG_INSN_P (insn))
|
|
continue;
|
|
break;
|
|
}
|
|
|
|
return insn;
|
|
}
|
|
|
|
|
|
|
|
/* Given a chain of REG_NOTES originally from FROM_INSN, try to place them
|
/* Given a chain of REG_NOTES originally from FROM_INSN, try to place them
|
as appropriate. I3 and I2 are the insns resulting from the combination
|
as appropriate. I3 and I2 are the insns resulting from the combination
|
insns including FROM (I2 may be zero).
|
insns including FROM (I2 may be zero).
|
|
|
