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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [gnu-src/] [newlib-1.18.0/] [newlib-1.18.0-or32-1.0rc2/] [libgloss/] [or32/] [crt0.S] - Diff between revs 507 and 517

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Rev 507 Rev 517
Line 57... Line 57...
#define CALL_EXCEPTION_HANDLER                          \
#define CALL_EXCEPTION_HANDLER                          \
        l.addi  r1, r1, -EXCEPTION_STACK_SIZE;          \
        l.addi  r1, r1, -EXCEPTION_STACK_SIZE;          \
        l.sw    4(r1), r3;                              \
        l.sw    4(r1), r3;                              \
        l.sw    8(r1), r4;                              \
        l.sw    8(r1), r4;                              \
        l.mfspr r3,r0,SPR_NPC;                          \
        l.mfspr r3,r0,SPR_NPC;                          \
        l.j     _exception_handler;                     \
        l.j     or1k_exception_handler;                 \
        l.mfspr r4,r0,SPR_EPCR_BASE
        l.mfspr r4,r0,SPR_EPCR_BASE
 
 
/* -------------------------------------------------------------------------- */
/* -------------------------------------------------------------------------- */
/*!Exception vectors                                                          */
/*!Exception vectors                                                          */
/* -------------------------------------------------------------------------- */
/* -------------------------------------------------------------------------- */
Line 261... Line 261...
        l.lwz   r2,0(r2)
        l.lwz   r2,0(r2)
        l.add   r1,r1,r2
        l.add   r1,r1,r2
        l.or    r2,r1,r1
        l.or    r2,r1,r1
 
 
        /* Store stack address in stack variable */
        /* Store stack address in stack variable */
        l.movhi r26,hi(stack)
        l.movhi r3,hi(stack)
        l.ori   r26,r26,lo(stack)
        l.ori   r3,r3,lo(stack)
        l.sw    0(r26),r1
        l.sw    0(r3),r1
 
 
        /* Initialise cache */
        /* Initialise cache */
        /* TODO - potentially make this optional for simulation targets to save
        /* TODO - potentially make this optional for simulation targets to save
        time during startup */
        time during startup */
        l.jal   _cache_init
        l.jal   or1k_cache_init
        l.nop
        l.nop
 
 
        /* Clear BSS */
        /* Clear BSS */
.L10:   l.movhi r28,hi(__bss_start)
.L10:   l.movhi r3,hi(__bss_start)
        l.ori   r28,r28,lo(__bss_start)
        l.ori   r3,r3,lo(__bss_start)
        l.movhi r30,hi(end)
        l.movhi r4,hi(end)
        l.ori   r30,r30,lo(end)
        l.ori   r4,r4,lo(end)
 
 
.L1:    l.sw    (0)(r28),r0
.L1:    l.sw    (0)(r3),r0
        l.sfltu r28,r30
        l.sfltu r3,r4
        l.bf    .L1
        l.bf    .L1
        l.addi  r28,r28,4               /* Delay slot */
        l.addi  r3,r3,4         /* Delay slot */
 
 
        /* Call global and static constructors */
        /* Call global and static constructors */
        l.jal   __init
        l.jal   __init
        l.nop
        l.nop
 
 
        /* Set up destructors to be called from exit if main never returns */
        /* Set up destructors to be called from exit if main ever returns */
        l.movhi r3,hi(__fini)
        l.movhi r3,hi(__fini)
        l.jal   atexit
        l.jal   atexit
        l.ori   r3,r3,lo(__fini)        /* Delay slot */
        l.ori   r3,r3,lo(__fini)        /* Delay slot */
 
 
        /* Check if UART is to be initialised */
        /* Check if UART is to be initialised */

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