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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [bootloaders/] [orpmon/] [include/] [board.h] - Diff between revs 405 and 419

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Rev 405 Rev 419
Line 11... Line 11...
/* BOARD
/* BOARD
 * 0 - bender
 * 0 - bender
 * 1 - marvin
 * 1 - marvin
 * 2 - ORSoC A3PE1500 board
 * 2 - ORSoC A3PE1500 board
 * 3 - ORSoC A3P1000 board
 * 3 - ORSoC A3P1000 board
 
 * 4 - ML501
 */
 */
#define BOARD                   2
#define BOARD                   2
 
 
/* Ethernet IP and TFTP config
/* Ethernet IP and TFTP config
 * 0 - JB ORSoC board
 * 0 - JB ORSoC board
Line 63... Line 64...
#  define IN_CLK                  20000000
#  define IN_CLK                  20000000
 
 
#  define FLASH_ORG_16_2          1
#  define FLASH_ORG_16_2          1
#  define BOARD_DEF_NAME          "ORSoC devboard"
#  define BOARD_DEF_NAME          "ORSoC devboard"
#elif BOARD==3
#elif BOARD==3
//ORSoC A3P1000 usbethdev board
//ORSoC ordb1a3p1000
 
 
#  define FLASH_BASE_ADDR         0xf0000000
#  define FLASH_BASE_ADDR         0xf0000000
#  define FLASH_SIZE              0x04000000
#  define FLASH_SIZE              0x04000000
#  define FLASH_BLOCK_SIZE        0x00040000
#  define FLASH_BLOCK_SIZE        0x00040000
#  define START_ADD               0x0
#  define START_ADD               0x0
Line 76... Line 77...
#  define SDRAM_BANK_SIZE         0x00800000
#  define SDRAM_BANK_SIZE         0x00800000
#  define IN_CLK                  25000000
#  define IN_CLK                  25000000
#  define FLASH_ORG_16_2          1
#  define FLASH_ORG_16_2          1
#  define BOARD_DEF_NAME          "ORSoC A3P1000 devboard"
#  define BOARD_DEF_NAME          "ORSoC A3P1000 devboard"
 
 
 
#elif BOARD==4
 
//Xilinx ML501
 
 
 
#  define FLASH_BASE_ADDR         0xf0000000
 
#  define FLASH_SIZE              0x04000000
 
#  define FLASH_BLOCK_SIZE        0x00040000
 
#  define START_ADD               0x0
 
#  define SDRAM_SIZE              0x10000000
 
#  define SDRAM_ROW_SIZE          0x00000400
 
#  define SDRAM_BANK_SIZE         0x00800000
 
#  define IN_CLK                  50000000
 
#  define FLASH_ORG_16_2          1
 
#  define BOARD_DEF_NAME          "Xilinx ML501"
 
 
#else
#else
//Custom Board
//Custom Board
 
 
#  define FLASH_BASE_ADDR         0xf0000000
#  define FLASH_BASE_ADDR         0xf0000000
#  define FLASH_SIZE              0x04000000
#  define FLASH_SIZE              0x04000000
Line 126... Line 141...
#define ETH_MACADDR5            0x9b
#define ETH_MACADDR5            0x9b
 
 
#elif IPCONFIG==2
#elif IPCONFIG==2
 
 
#define BOARD_DEF_IP            0xac1e0002 // 172.30.0.2
#define BOARD_DEF_IP            0xac1e0002 // 172.30.0.2
#define BOARD_DEF_MASK          0xffffff00 // 255.255.255.0
#define BOARD_DEF_MASK          0xffff0000 // 255.255.0.0
#define BOARD_DEF_GW            0xac1e0001 //"172.30.0.1"
#define BOARD_DEF_GW            0xac1e0001 //"172.30.0.1"
#define BOARD_DEF_TBOOT_SRVR    0xac1e0001 //"172.30.0.1"
#define BOARD_DEF_TBOOT_SRVR    0xac1e0001 //"172.30.0.1"
#define BOARD_DEF_IMAGE_NAME    "boot.img"
#define BOARD_DEF_IMAGE_NAME    "boot.img"
#define BOARD_DEF_LOAD_SPACE    0xa00000
#define BOARD_DEF_LOAD_SPACE    0xa00000
#define ETH_MDIOPHYADDR         0x00
#define ETH_MDIOPHYADDR         0x00

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