| Line 56... |
Line 56... |
# define SDRAM_SIZE 0x02000000
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# define SDRAM_SIZE 0x02000000
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# define SDRAM_ROW_SIZE 0x00000400
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# define SDRAM_ROW_SIZE 0x00000400
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# define SDRAM_BANK_SIZE 0x00800000
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# define SDRAM_BANK_SIZE 0x00800000
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# define IN_CLK 20000000
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# define IN_CLK 20000000
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|
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# define FLASH_ORG_16_2 1
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# define BOARD_DEF_NAME "ORSoC devboard"
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# define BOARD_DEF_NAME "ORSoC devboard"
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#elif BOARD==3
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#elif BOARD==3
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//ORSoC ordb1a3p1000
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//ORSoC ordb1a3p1000
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|
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# define SDRAM_SIZE 0x02000000
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# define SDRAM_SIZE 0x02000000
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| Line 182... |
Line 181... |
#define UART_BAUD_RATE 115200
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#define UART_BAUD_RATE 115200
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|
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/* Ethernet core defines */
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/* Ethernet core defines */
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#define ETH_BASE 0x92000000
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#define ETH_BASE 0x92000000
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#define ETH_IRQ 4
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#define ETH_IRQ 4
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#define ETH_DATA_BASE ((((unsigned long)&_src_addr) + 16) & ~0x3)
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#define ETH_DATA_BASE ((((unsigned long)&_stack_top) + 16) & ~0x3)
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#define SPI_BASE 0xb0000000
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#define SPI_BASE 0xb0000000
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#define CRT_BASE_ADDR 0x97000000
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#define CRT_BASE_ADDR 0x97000000
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#define ATA_BASE_ADDR 0x9e000000
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#define ATA_BASE_ADDR 0x9e000000
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#define KBD_BASE_ADD 0x94000000
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#define KBD_BASE_ADD 0x94000000
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#define KBD_IRQ 5
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#define KBD_IRQ 5
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|
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#define SDC_CONTROLLER_BASE 0x9e000000
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#define SDC_CONTROLLER_BASE 0x9e000000
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|
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#define SANCHO_BASE_ADD 0x98000000
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|
|
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#define CRT_ENABLED 0
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#define CRT_ENABLED 0
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#define FB_BASE_ADDR 0xa8000000
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#define FB_BASE_ADDR 0xa8000000
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|
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/* Whether online help is available -- saves space */
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/* Whether online help is available -- saves space */
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#define HELP_ENABLED 1
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#define HELP_ENABLED 1
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