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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [bootloaders/] [orpmon/] [ram.ld] - Diff between revs 175 and 246

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Rev 175 Rev 246
Line 1... Line 1...
 
 
/* Seen 3 bad pages, 180-182 (0xb400-0xb6ff), so put text after these pages */
/* Seen 3 bad pages, 180-182 (0xb400-0xb6ff), so put text after these pages */
 
 
MEMORY
MEMORY
        {
        {
        vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000
        vectors : ORIGIN = 0x00000000, LENGTH = 0x00002000
        /*ram     : ORIGIN = 0x00002000, LENGTH = 0x02000000 - 0x00002000*/
        ram     : ORIGIN = 0x00002000, LENGTH = 0x02000000 - 0x00002000
 
 
 
        /* Uncomment the following to work around bad pages in a flash mem */
 
        /*
        ram     : ORIGIN = 0x00001200, LENGTH = 0xB400 - 0x1200
        ram     : ORIGIN = 0x00001200, LENGTH = 0xB400 - 0x1200
        ram2     : ORIGIN = 0xb700, LENGTH = 0x02000000 - 0xb700
        ram2     : ORIGIN = 0xb700, LENGTH = 0x02000000 - 0xb700
 
        */
        /*flash   : ORIGIN = 0xf0000000, LENGTH = 0x04000000*/
        /*flash   : ORIGIN = 0xf0000000, LENGTH = 0x04000000*/
        }
        }
 
 
 
 
 
 
Line 22... Line 27...
        .text :
        .text :
        {
        {
        _text_begin = .;
        _text_begin = .;
        *(.text)
        *(.text)
        _text_end = .;
        _text_end = .;
        } > ram2
        } > ram
 
 
        .data :
        .data :
/*      AT ( ADDR (.text) + SIZEOF(.text) + SIZEOF(.mytext))*/
/*      AT ( ADDR (.text) + SIZEOF(.text) + SIZEOF(.mytext))*/
        {
        {
        *(.data)
        *(.data)
Line 44... Line 49...
        } > ram
        } > ram
 
 
        .stack :
        .stack :
        {
        {
        *(.stack)
        *(.stack)
        _src_addr = .;
        src_addr = .;
        } > ram2
        } > ram
/*
/*
        .monitor :
        .monitor :
        {
        {
        *(.monitor)
        *(.monitor)
        } > ram
        } > ram

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