URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.2.2/] [gcc/] [config/] [or32/] [initfini.c] - Diff between revs 177 and 192

Rev 177	Rev 192
Line 92...	Line 92...
`l.addi r2,r1,16\n\`	`l.addi r2,r1,16\n\`
`l.sw 8(r1),r9\n\`	`l.sw 8(r1),r9\n\`
`");`	`");`

`/* .fini section start.`	`/* .fini section start.`
`This must appear at the start of the .init section. */`	`This must appear at the start of the .init section.`

	`Note that the prologue is slightly different order to standard. Saving the`
	`link register in the delay slot will pick up the wrong value!`
	`*/`

`asm ("\n\`	`asm ("\n\`
`.section .fini\n\`	`.section .fini\n\`
`.global fini\n\`	`.global fini\n\`
`.word 0\n\`	`.word 0\n\`
`fini:\n\`	`fini:\n\`
`l.addi r1,r1,-16\n\`	`l.addi r1,r1,-16\n\`
`l.sw 12(r1),r2\n\`	`l.sw 12(r1),r2\n\`
`l.addi r2,r1,16\n\`
`l.sw 8(r1),r9\n\`	`l.sw 8(r1),r9\n\`
`l.j __do_global_dtors\n\`	`l.jal __do_global_dtors\n\`
	`l.addi r2,r1,16\n\`
`");`	`");`

`#endif /* CRT_INIT */`	`#endif /* CRT_INIT */`

`#ifdef CRT_FINI`	`#ifdef CRT_FINI`
Line 143...	Line 147...
`/* .init section end.`	`/* .init section end.`
`This must live at the end of the .init section. */`	`This must live at the end of the .init section. */`

`asm ("\n\`	`asm ("\n\`
`.section .init\n\`	`.section .init\n\`
`l.j __do_global_ctors\n\`	`l.jal __do_global_ctors\n\`
	`l.nop\n\`
`l.lwz r9,8(r1)\n\`	`l.lwz r9,8(r1)\n\`
`l.lwz r2,12(r1)\n\`	`l.lwz r2,12(r1)\n\`
`l.jr r9\n\`	`l.jr r9\n\`
`l.addi r1,r1,16\n\`	`l.addi r1,r1,16\n\`
`");`	`");`