URL
https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
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| Rev 282 |
Rev 378 |
| Line 7573... |
Line 7573... |
(plus:SWI
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(plus:SWI
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(match_operand:SWI 1 "nonimmediate_operand" "%0")
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(match_operand:SWI 1 "nonimmediate_operand" "%0")
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(match_operand:SWI 2 "" "m"))
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(match_operand:SWI 2 "" "m"))
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(match_dup 1)))
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(match_dup 1)))
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(clobber (match_scratch:SWI 0 "="))]
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(clobber (match_scratch:SWI 0 "="))]
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"ix86_binary_operator_ok (PLUS, mode, operands)"
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"!(MEM_P (operands[1]) && MEM_P (operands[2]))"
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"add{}\t{%2, %0|%0, %2}"
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"add{}\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")
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[(set_attr "type" "alu")
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(set_attr "mode" "")])
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(set_attr "mode" "")])
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(define_insn "*sub3_cconly_overflow"
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(define_insn "*sub3_cconly_overflow"
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| Line 8997... |
Line 8997... |
(match_operand:SWI 1 "nonimmediate_operand" "%0")
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(match_operand:SWI 1 "nonimmediate_operand" "%0")
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(match_operand:SWI 2 "" ""))
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(match_operand:SWI 2 "" ""))
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(const_int 0)))
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(const_int 0)))
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(clobber (match_scratch:SWI 0 "="))]
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(clobber (match_scratch:SWI 0 "="))]
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"ix86_match_ccmode (insn, CCNOmode)
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"ix86_match_ccmode (insn, CCNOmode)
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&& ix86_binary_operator_ok (, mode, operands)"
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&& !(MEM_P (operands[1]) && MEM_P (operands[2]))"
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"{}\t{%2, %0|%0, %2}"
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"{}\t{%2, %0|%0, %2}"
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[(set_attr "type" "alu")
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[(set_attr "type" "alu")
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(set_attr "mode" "")])
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(set_attr "mode" "")])
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(define_insn "*qi_ext_0"
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(define_insn "*qi_ext_0"
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