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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gcc-4.5.1/] [gcc/] [config/] [or32/] [or32.c] - Diff between revs 490 and 518

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Rev 490 Rev 518
Line 920... Line 920...
                abort ();
                abort ();
            }
            }
          else
          else
            abort ();
            abort ();
        }
        }
      else if (GET_CODE (operands[1]) == CONST_INT)
 
        {
 
          if (INTVAL (operands[1]) < 0)
 
            output_asm_insn ("\tl.addi  \t%0, r0, -1", operands);
 
          else
 
            output_asm_insn ("\tl.or    \t%0, r0, r0", operands);
 
          output_asm_insn ("\tl.movhi \t%H0, hi(%1)", operands);
 
          output_asm_insn ("\tl.ori   \t%H0, %H0, lo(%1)", operands);
 
          return "";
 
        }
 
      else
      else
        abort ();
        abort ();
    case MEM:
    case MEM:
      xoperands[0] = XEXP (operands[0], 0);
      xoperands[0] = XEXP (operands[0], 0);
      if (GET_CODE (xoperands[0]) == REG)
      if (GET_CODE (xoperands[0]) == REG)

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