| Line 130... |
Line 130... |
#define bfd_mach_mips7000 7000
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#define bfd_mach_mips7000 7000
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#define bfd_mach_mips8000 8000
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#define bfd_mach_mips8000 8000
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#define bfd_mach_mips9000 9000
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#define bfd_mach_mips9000 9000
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#define bfd_mach_mips10000 10000
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#define bfd_mach_mips10000 10000
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#define bfd_mach_mips12000 12000
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#define bfd_mach_mips12000 12000
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#define bfd_mach_mips14000 14000
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#define bfd_mach_mips16000 16000
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#define bfd_mach_mips16 16
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#define bfd_mach_mips16 16
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#define bfd_mach_mips5 5
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#define bfd_mach_mips5 5
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#define bfd_mach_mips_loongson_2e 3001
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#define bfd_mach_mips_loongson_2e 3001
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#define bfd_mach_mips_loongson_2f 3002
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#define bfd_mach_mips_loongson_2f 3002
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#define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01 */
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#define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01 */
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#define bfd_mach_mips_octeon 6501
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#define bfd_mach_mips_octeon 6501
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#define bfd_mach_mips_xlr 887682 /* decimal 'XLR' */
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#define bfd_mach_mipsisa32 32
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#define bfd_mach_mipsisa32 32
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#define bfd_mach_mipsisa32r2 33
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#define bfd_mach_mipsisa32r2 33
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#define bfd_mach_mipsisa64 64
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#define bfd_mach_mipsisa64 64
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#define bfd_mach_mipsisa64r2 65
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#define bfd_mach_mipsisa64r2 65
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bfd_arch_i386, /* Intel 386 */
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bfd_arch_i386, /* Intel 386 */
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#define bfd_mach_i386_i386 1
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#define bfd_mach_i386_i386 1
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#define bfd_mach_i386_i8086 2
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#define bfd_mach_i386_i8086 2
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#define bfd_mach_i386_i386_intel_syntax 3
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#define bfd_mach_i386_i386_intel_syntax 3
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#define bfd_mach_x86_64 64
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#define bfd_mach_x86_64 64
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#define bfd_mach_x86_64_intel_syntax 65
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#define bfd_mach_x86_64_intel_syntax 65
|
|
bfd_arch_l1om, /* Intel L1OM */
|
|
#define bfd_mach_l1om 66
|
|
#define bfd_mach_l1om_intel_syntax 67
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bfd_arch_we32k, /* AT&T WE32xxx */
|
bfd_arch_we32k, /* AT&T WE32xxx */
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bfd_arch_tahoe, /* CCI/Harris Tahoe */
|
bfd_arch_tahoe, /* CCI/Harris Tahoe */
|
bfd_arch_i860, /* Intel 860 */
|
bfd_arch_i860, /* Intel 860 */
|
bfd_arch_i370, /* IBM 360/370 Mainframes */
|
bfd_arch_i370, /* IBM 360/370 Mainframes */
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bfd_arch_romp, /* IBM ROMP PC/RT */
|
bfd_arch_romp, /* IBM ROMP PC/RT */
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| Line 164... |
Line 170... |
#define bfd_mach_h8300hn 4
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#define bfd_mach_h8300hn 4
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#define bfd_mach_h8300sn 5
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#define bfd_mach_h8300sn 5
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#define bfd_mach_h8300sx 6
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#define bfd_mach_h8300sx 6
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#define bfd_mach_h8300sxn 7
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#define bfd_mach_h8300sxn 7
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bfd_arch_pdp11, /* DEC PDP-11 */
|
bfd_arch_pdp11, /* DEC PDP-11 */
|
|
bfd_arch_plugin,
|
bfd_arch_powerpc, /* PowerPC */
|
bfd_arch_powerpc, /* PowerPC */
|
#define bfd_mach_ppc 32
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#define bfd_mach_ppc 32
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#define bfd_mach_ppc64 64
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#define bfd_mach_ppc64 64
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#define bfd_mach_ppc_403 403
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#define bfd_mach_ppc_403 403
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#define bfd_mach_ppc_403gc 4030
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#define bfd_mach_ppc_403gc 4030
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|
#define bfd_mach_ppc_405 405
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#define bfd_mach_ppc_505 505
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#define bfd_mach_ppc_505 505
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#define bfd_mach_ppc_601 601
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#define bfd_mach_ppc_601 601
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#define bfd_mach_ppc_602 602
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#define bfd_mach_ppc_602 602
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#define bfd_mach_ppc_603 603
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#define bfd_mach_ppc_603 603
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#define bfd_mach_ppc_ec603e 6031
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#define bfd_mach_ppc_ec603e 6031
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| Line 184... |
Line 192... |
#define bfd_mach_ppc_a35 35
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#define bfd_mach_ppc_a35 35
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#define bfd_mach_ppc_rs64ii 642
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#define bfd_mach_ppc_rs64ii 642
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#define bfd_mach_ppc_rs64iii 643
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#define bfd_mach_ppc_rs64iii 643
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#define bfd_mach_ppc_7400 7400
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#define bfd_mach_ppc_7400 7400
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#define bfd_mach_ppc_e500 500
|
#define bfd_mach_ppc_e500 500
|
|
#define bfd_mach_ppc_e500mc 5001
|
bfd_arch_rs6000, /* IBM RS/6000 */
|
bfd_arch_rs6000, /* IBM RS/6000 */
|
#define bfd_mach_rs6k 6000
|
#define bfd_mach_rs6k 6000
|
#define bfd_mach_rs6k_rs1 6001
|
#define bfd_mach_rs6k_rs1 6001
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#define bfd_mach_rs6k_rsc 6003
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#define bfd_mach_rs6k_rsc 6003
|
#define bfd_mach_rs6k_rs2 6002
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#define bfd_mach_rs6k_rs2 6002
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| Line 290... |
Line 299... |
#define bfd_mach_fr400 400
|
#define bfd_mach_fr400 400
|
#define bfd_mach_fr450 450
|
#define bfd_mach_fr450 450
|
#define bfd_mach_frvtomcat 499 /* fr500 prototype */
|
#define bfd_mach_frvtomcat 499 /* fr500 prototype */
|
#define bfd_mach_fr500 500
|
#define bfd_mach_fr500 500
|
#define bfd_mach_fr550 550
|
#define bfd_mach_fr550 550
|
|
bfd_arch_moxie, /* The moxie processor */
|
|
#define bfd_mach_moxie 1
|
bfd_arch_mcore,
|
bfd_arch_mcore,
|
bfd_arch_mep,
|
bfd_arch_mep,
|
#define bfd_mach_mep 1
|
#define bfd_mach_mep 1
|
#define bfd_mach_mep_h1 0x6831
|
#define bfd_mach_mep_h1 0x6831
|
|
#define bfd_mach_mep_c5 0x6335
|
bfd_arch_ia64, /* HP/Intel ia64 */
|
bfd_arch_ia64, /* HP/Intel ia64 */
|
#define bfd_mach_ia64_elf64 64
|
#define bfd_mach_ia64_elf64 64
|
#define bfd_mach_ia64_elf32 32
|
#define bfd_mach_ia64_elf32 32
|
bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */
|
bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */
|
#define bfd_mach_ip2022 1
|
#define bfd_mach_ip2022 1
|
| Line 311... |
Line 323... |
#define bfd_mach_ms2 3
|
#define bfd_mach_ms2 3
|
bfd_arch_pj,
|
bfd_arch_pj,
|
bfd_arch_avr, /* Atmel AVR microcontrollers. */
|
bfd_arch_avr, /* Atmel AVR microcontrollers. */
|
#define bfd_mach_avr1 1
|
#define bfd_mach_avr1 1
|
#define bfd_mach_avr2 2
|
#define bfd_mach_avr2 2
|
|
#define bfd_mach_avr25 25
|
#define bfd_mach_avr3 3
|
#define bfd_mach_avr3 3
|
|
#define bfd_mach_avr31 31
|
|
#define bfd_mach_avr35 35
|
#define bfd_mach_avr4 4
|
#define bfd_mach_avr4 4
|
#define bfd_mach_avr5 5
|
#define bfd_mach_avr5 5
|
|
#define bfd_mach_avr51 51
|
#define bfd_mach_avr6 6
|
#define bfd_mach_avr6 6
|
bfd_arch_bfin, /* ADI Blackfin */
|
bfd_arch_bfin, /* ADI Blackfin */
|
#define bfd_mach_bfin 1
|
#define bfd_mach_bfin 1
|
bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */
|
bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */
|
#define bfd_mach_cr16 1
|
#define bfd_mach_cr16 1
|
| Line 331... |
Line 347... |
#define bfd_mach_cris_v10_v32 1032
|
#define bfd_mach_cris_v10_v32 1032
|
bfd_arch_s390, /* IBM s390 */
|
bfd_arch_s390, /* IBM s390 */
|
#define bfd_mach_s390_31 31
|
#define bfd_mach_s390_31 31
|
#define bfd_mach_s390_64 64
|
#define bfd_mach_s390_64 64
|
bfd_arch_score, /* Sunplus score */
|
bfd_arch_score, /* Sunplus score */
|
|
#define bfd_mach_score3 3
|
|
#define bfd_mach_score7 7
|
bfd_arch_openrisc, /* OpenRISC */
|
bfd_arch_openrisc, /* OpenRISC */
|
bfd_arch_mmix, /* Donald Knuth's educational processor. */
|
bfd_arch_mmix, /* Donald Knuth's educational processor. */
|
bfd_arch_xstormy16,
|
bfd_arch_xstormy16,
|
#define bfd_mach_xstormy16 1
|
#define bfd_mach_xstormy16 1
|
bfd_arch_msp430, /* Texas Instruments MSP430 architecture. */
|
bfd_arch_msp430, /* Texas Instruments MSP430 architecture. */
|
| Line 365... |
Line 383... |
bfd_arch_z80,
|
bfd_arch_z80,
|
#define bfd_mach_z80strict 1 /* No undocumented opcodes. */
|
#define bfd_mach_z80strict 1 /* No undocumented opcodes. */
|
#define bfd_mach_z80 3 /* With ixl, ixh, iyl, and iyh. */
|
#define bfd_mach_z80 3 /* With ixl, ixh, iyl, and iyh. */
|
#define bfd_mach_z80full 7 /* All undocumented instructions. */
|
#define bfd_mach_z80full 7 /* All undocumented instructions. */
|
#define bfd_mach_r800 11 /* R800: successor with multiplication. */
|
#define bfd_mach_r800 11 /* R800: successor with multiplication. */
|
|
bfd_arch_lm32, /* Lattice Mico32 */
|
|
#define bfd_mach_lm32 1
|
|
bfd_arch_microblaze,/* Xilinx MicroBlaze. */
|
bfd_arch_last
|
bfd_arch_last
|
@};
|
@};
|
@end example
|
@end example
|
|
|
@subsection bfd_arch_info
|
@subsection bfd_arch_info
|
