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Line 554... Line 554...
For ELF.
For ELF.
@end deffn
@end deffn
@deffn {} BFD_RELOC_68K_GLOB_DAT
@deffn {} BFD_RELOC_68K_GLOB_DAT
@deffnx {} BFD_RELOC_68K_JMP_SLOT
@deffnx {} BFD_RELOC_68K_JMP_SLOT
@deffnx {} BFD_RELOC_68K_RELATIVE
@deffnx {} BFD_RELOC_68K_RELATIVE
 
@deffnx {} BFD_RELOC_68K_TLS_GD32
 
@deffnx {} BFD_RELOC_68K_TLS_GD16
 
@deffnx {} BFD_RELOC_68K_TLS_GD8
 
@deffnx {} BFD_RELOC_68K_TLS_LDM32
 
@deffnx {} BFD_RELOC_68K_TLS_LDM16
 
@deffnx {} BFD_RELOC_68K_TLS_LDM8
 
@deffnx {} BFD_RELOC_68K_TLS_LDO32
 
@deffnx {} BFD_RELOC_68K_TLS_LDO16
 
@deffnx {} BFD_RELOC_68K_TLS_LDO8
 
@deffnx {} BFD_RELOC_68K_TLS_IE32
 
@deffnx {} BFD_RELOC_68K_TLS_IE16
 
@deffnx {} BFD_RELOC_68K_TLS_IE8
 
@deffnx {} BFD_RELOC_68K_TLS_LE32
 
@deffnx {} BFD_RELOC_68K_TLS_LE16
 
@deffnx {} BFD_RELOC_68K_TLS_LE8
Relocations used by 68K ELF.
Relocations used by 68K ELF.
@end deffn
@end deffn
@deffn {} BFD_RELOC_32_BASEREL
@deffn {} BFD_RELOC_32_BASEREL
@deffnx {} BFD_RELOC_16_BASEREL
@deffnx {} BFD_RELOC_16_BASEREL
@deffnx {} BFD_RELOC_LO16_BASEREL
@deffnx {} BFD_RELOC_LO16_BASEREL
Line 610... Line 625...
@deffnx {} BFD_RELOC_SPARC_JMP_SLOT
@deffnx {} BFD_RELOC_SPARC_JMP_SLOT
@deffnx {} BFD_RELOC_SPARC_RELATIVE
@deffnx {} BFD_RELOC_SPARC_RELATIVE
@deffnx {} BFD_RELOC_SPARC_UA16
@deffnx {} BFD_RELOC_SPARC_UA16
@deffnx {} BFD_RELOC_SPARC_UA32
@deffnx {} BFD_RELOC_SPARC_UA32
@deffnx {} BFD_RELOC_SPARC_UA64
@deffnx {} BFD_RELOC_SPARC_UA64
 
@deffnx {} BFD_RELOC_SPARC_GOTDATA_HIX22
 
@deffnx {} BFD_RELOC_SPARC_GOTDATA_LOX10
 
@deffnx {} BFD_RELOC_SPARC_GOTDATA_OP_HIX22
 
@deffnx {} BFD_RELOC_SPARC_GOTDATA_OP_LOX10
 
@deffnx {} BFD_RELOC_SPARC_GOTDATA_OP
SPARC ELF relocations.  There is probably some overlap with other
SPARC ELF relocations.  There is probably some overlap with other
relocation types already defined.
relocation types already defined.
@end deffn
@end deffn
@deffn {} BFD_RELOC_SPARC_BASE13
@deffn {} BFD_RELOC_SPARC_BASE13
@deffnx {} BFD_RELOC_SPARC_BASE22
@deffnx {} BFD_RELOC_SPARC_BASE22
Line 686... Line 706...
@deffnx {} BFD_RELOC_SPU_PCREL16
@deffnx {} BFD_RELOC_SPU_PCREL16
@deffnx {} BFD_RELOC_SPU_LO16
@deffnx {} BFD_RELOC_SPU_LO16
@deffnx {} BFD_RELOC_SPU_HI16
@deffnx {} BFD_RELOC_SPU_HI16
@deffnx {} BFD_RELOC_SPU_PPU32
@deffnx {} BFD_RELOC_SPU_PPU32
@deffnx {} BFD_RELOC_SPU_PPU64
@deffnx {} BFD_RELOC_SPU_PPU64
 
@deffnx {} BFD_RELOC_SPU_ADD_PIC
SPU Relocations.
SPU Relocations.
@end deffn
@end deffn
@deffn {} BFD_RELOC_ALPHA_GPDISP_HI16
@deffn {} BFD_RELOC_ALPHA_GPDISP_HI16
Alpha ECOFF and ELF relocations.  Some of these treat the symbol or
Alpha ECOFF and ELF relocations.  Some of these treat the symbol or
"addend" in some special way.
"addend" in some special way.
Line 757... Line 778...
@deffn {} BFD_RELOC_ALPHA_BRSGP
@deffn {} BFD_RELOC_ALPHA_BRSGP
Like BFD_RELOC_23_PCREL_S2, except that the source and target must
Like BFD_RELOC_23_PCREL_S2, except that the source and target must
share a common GP, and the target address is adjusted for
share a common GP, and the target address is adjusted for
STO_ALPHA_STD_GPLOAD.
STO_ALPHA_STD_GPLOAD.
@end deffn
@end deffn
 
@deffn {} BFD_RELOC_ALPHA_NOP
 
The NOP relocation outputs a NOP if the longword displacement
 
between two procedure entry points is < 2^21.
 
@end deffn
 
@deffn {} BFD_RELOC_ALPHA_BSR
 
The BSR relocation outputs a BSR if the longword displacement
 
between two procedure entry points is < 2^21.
 
@end deffn
 
@deffn {} BFD_RELOC_ALPHA_LDA
 
The LDA relocation outputs a LDA if the longword displacement
 
between two procedure entry points is < 2^16.
 
@end deffn
 
@deffn {} BFD_RELOC_ALPHA_BOH
 
The BOH relocation outputs a BSR if the longword displacement
 
between two procedure entry points is < 2^21, or else a hint.
 
@end deffn
@deffn {} BFD_RELOC_ALPHA_TLSGD
@deffn {} BFD_RELOC_ALPHA_TLSGD
@deffnx {} BFD_RELOC_ALPHA_TLSLDM
@deffnx {} BFD_RELOC_ALPHA_TLSLDM
@deffnx {} BFD_RELOC_ALPHA_DTPMOD64
@deffnx {} BFD_RELOC_ALPHA_DTPMOD64
@deffnx {} BFD_RELOC_ALPHA_GOTDTPREL16
@deffnx {} BFD_RELOC_ALPHA_GOTDTPREL16
@deffnx {} BFD_RELOC_ALPHA_DTPREL64
@deffnx {} BFD_RELOC_ALPHA_DTPREL64
Line 803... Line 840...
High 16 bits of 32-bit pc-relative value, adjusted
High 16 bits of 32-bit pc-relative value, adjusted
@end deffn
@end deffn
@deffn {} BFD_RELOC_LO16_PCREL
@deffn {} BFD_RELOC_LO16_PCREL
Low 16 bits of pc-relative value
Low 16 bits of pc-relative value
@end deffn
@end deffn
 
@deffn {} BFD_RELOC_MIPS16_GOT16
 
@deffnx {} BFD_RELOC_MIPS16_CALL16
 
Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of
 
16-bit immediate fields
 
@end deffn
@deffn {} BFD_RELOC_MIPS16_HI16
@deffn {} BFD_RELOC_MIPS16_HI16
MIPS16 high 16 bits of 32-bit value.
MIPS16 high 16 bits of 32-bit value.
@end deffn
@end deffn
@deffn {} BFD_RELOC_MIPS16_HI16_S
@deffn {} BFD_RELOC_MIPS16_HI16_S
MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
Line 856... Line 898...
@deffnx {} BFD_RELOC_MIPS_TLS_TPREL_LO16
@deffnx {} BFD_RELOC_MIPS_TLS_TPREL_LO16
MIPS ELF relocations.
MIPS ELF relocations.
@end deffn
@end deffn
@deffn {} BFD_RELOC_MIPS_COPY
@deffn {} BFD_RELOC_MIPS_COPY
@deffnx {} BFD_RELOC_MIPS_JUMP_SLOT
@deffnx {} BFD_RELOC_MIPS_JUMP_SLOT
MIPS ELF relocations (VxWorks extensions).
MIPS ELF relocations (VxWorks and PLT extensions).
 
@end deffn
 
@deffn {} BFD_RELOC_MOXIE_10_PCREL
 
Moxie ELF relocations.
@end deffn
@end deffn
@deffn {} BFD_RELOC_FRV_LABEL16
@deffn {} BFD_RELOC_FRV_LABEL16
@deffnx {} BFD_RELOC_FRV_LABEL24
@deffnx {} BFD_RELOC_FRV_LABEL24
@deffnx {} BFD_RELOC_FRV_LO16
@deffnx {} BFD_RELOC_FRV_LO16
@deffnx {} BFD_RELOC_FRV_HI16
@deffnx {} BFD_RELOC_FRV_HI16
Line 959... Line 1004...
@deffnx {} BFD_RELOC_386_TLS_DTPOFF32
@deffnx {} BFD_RELOC_386_TLS_DTPOFF32
@deffnx {} BFD_RELOC_386_TLS_TPOFF32
@deffnx {} BFD_RELOC_386_TLS_TPOFF32
@deffnx {} BFD_RELOC_386_TLS_GOTDESC
@deffnx {} BFD_RELOC_386_TLS_GOTDESC
@deffnx {} BFD_RELOC_386_TLS_DESC_CALL
@deffnx {} BFD_RELOC_386_TLS_DESC_CALL
@deffnx {} BFD_RELOC_386_TLS_DESC
@deffnx {} BFD_RELOC_386_TLS_DESC
 
@deffnx {} BFD_RELOC_386_IRELATIVE
i386/elf relocations
i386/elf relocations
@end deffn
@end deffn
@deffn {} BFD_RELOC_X86_64_GOT32
@deffn {} BFD_RELOC_X86_64_GOT32
@deffnx {} BFD_RELOC_X86_64_PLT32
@deffnx {} BFD_RELOC_X86_64_PLT32
@deffnx {} BFD_RELOC_X86_64_COPY
@deffnx {} BFD_RELOC_X86_64_COPY
Line 987... Line 1033...
@deffnx {} BFD_RELOC_X86_64_GOTPLT64
@deffnx {} BFD_RELOC_X86_64_GOTPLT64
@deffnx {} BFD_RELOC_X86_64_PLTOFF64
@deffnx {} BFD_RELOC_X86_64_PLTOFF64
@deffnx {} BFD_RELOC_X86_64_GOTPC32_TLSDESC
@deffnx {} BFD_RELOC_X86_64_GOTPC32_TLSDESC
@deffnx {} BFD_RELOC_X86_64_TLSDESC_CALL
@deffnx {} BFD_RELOC_X86_64_TLSDESC_CALL
@deffnx {} BFD_RELOC_X86_64_TLSDESC
@deffnx {} BFD_RELOC_X86_64_TLSDESC
 
@deffnx {} BFD_RELOC_X86_64_IRELATIVE
x86-64/elf relocations
x86-64/elf relocations
@end deffn
@end deffn
@deffn {} BFD_RELOC_NS32K_IMM_8
@deffn {} BFD_RELOC_NS32K_IMM_8
@deffnx {} BFD_RELOC_NS32K_IMM_16
@deffnx {} BFD_RELOC_NS32K_IMM_16
@deffnx {} BFD_RELOC_NS32K_IMM_32
@deffnx {} BFD_RELOC_NS32K_IMM_32
Line 1071... Line 1118...
@deffnx {} BFD_RELOC_PPC64_PLTGOT16_DS
@deffnx {} BFD_RELOC_PPC64_PLTGOT16_DS
@deffnx {} BFD_RELOC_PPC64_PLTGOT16_LO_DS
@deffnx {} BFD_RELOC_PPC64_PLTGOT16_LO_DS
Power(rs6000) and PowerPC relocations.
Power(rs6000) and PowerPC relocations.
@end deffn
@end deffn
@deffn {} BFD_RELOC_PPC_TLS
@deffn {} BFD_RELOC_PPC_TLS
 
@deffnx {} BFD_RELOC_PPC_TLSGD
 
@deffnx {} BFD_RELOC_PPC_TLSLD
@deffnx {} BFD_RELOC_PPC_DTPMOD
@deffnx {} BFD_RELOC_PPC_DTPMOD
@deffnx {} BFD_RELOC_PPC_TPREL16
@deffnx {} BFD_RELOC_PPC_TPREL16
@deffnx {} BFD_RELOC_PPC_TPREL16_LO
@deffnx {} BFD_RELOC_PPC_TPREL16_LO
@deffnx {} BFD_RELOC_PPC_TPREL16_HI
@deffnx {} BFD_RELOC_PPC_TPREL16_HI
@deffnx {} BFD_RELOC_PPC_TPREL16_HA
@deffnx {} BFD_RELOC_PPC_TPREL16_HA
Line 2034... Line 2083...
@deffnx {} BFD_RELOC_390_GOT20
@deffnx {} BFD_RELOC_390_GOT20
@deffnx {} BFD_RELOC_390_GOTPLT20
@deffnx {} BFD_RELOC_390_GOTPLT20
@deffnx {} BFD_RELOC_390_TLS_GOTIE20
@deffnx {} BFD_RELOC_390_TLS_GOTIE20
Long displacement extension.
Long displacement extension.
@end deffn
@end deffn
@deffn {} BFD_RELOC_SCORE_DUMMY1
 
Score relocations
 
@end deffn
 
@deffn {} BFD_RELOC_SCORE_GPREL15
@deffn {} BFD_RELOC_SCORE_GPREL15
 
Score relocations
Low 16 bit for load/store
Low 16 bit for load/store
@end deffn
@end deffn
@deffn {} BFD_RELOC_SCORE_DUMMY2
@deffn {} BFD_RELOC_SCORE_DUMMY2
@deffnx {} BFD_RELOC_SCORE_JMP
@deffnx {} BFD_RELOC_SCORE_JMP
This is a 24-bit reloc with the right 1 bit assumed to be 0
This is a 24-bit reloc with the right 1 bit assumed to be 0
@end deffn
@end deffn
@deffn {} BFD_RELOC_SCORE_BRANCH
@deffn {} BFD_RELOC_SCORE_BRANCH
This is a 19-bit reloc with the right 1 bit assumed to be 0
This is a 19-bit reloc with the right 1 bit assumed to be 0
@end deffn
@end deffn
 
@deffn {} BFD_RELOC_SCORE_IMM30
 
This is a 32-bit reloc for 48-bit instructions.
 
@end deffn
 
@deffn {} BFD_RELOC_SCORE_IMM32
 
This is a 32-bit reloc for 48-bit instructions.
 
@end deffn
@deffn {} BFD_RELOC_SCORE16_JMP
@deffn {} BFD_RELOC_SCORE16_JMP
This is a 11-bit reloc with the right 1 bit assumed to be 0
This is a 11-bit reloc with the right 1 bit assumed to be 0
@end deffn
@end deffn
@deffn {} BFD_RELOC_SCORE16_BRANCH
@deffn {} BFD_RELOC_SCORE16_BRANCH
This is a 8-bit reloc with the right 1 bit assumed to be 0
This is a 8-bit reloc with the right 1 bit assumed to be 0
@end deffn
@end deffn
 
@deffn {} BFD_RELOC_SCORE_BCMP
 
This is a 9-bit reloc with the right 1 bit assumed to be 0
 
@end deffn
@deffn {} BFD_RELOC_SCORE_GOT15
@deffn {} BFD_RELOC_SCORE_GOT15
@deffnx {} BFD_RELOC_SCORE_GOT_LO16
@deffnx {} BFD_RELOC_SCORE_GOT_LO16
@deffnx {} BFD_RELOC_SCORE_CALL15
@deffnx {} BFD_RELOC_SCORE_CALL15
@deffnx {} BFD_RELOC_SCORE_DUMMY_HI16
@deffnx {} BFD_RELOC_SCORE_DUMMY_HI16
Undocumented Score relocs
Undocumented Score relocs
Line 2313... Line 2369...
@deffnx {} BFD_RELOC_CR16_DISP24
@deffnx {} BFD_RELOC_CR16_DISP24
@deffnx {} BFD_RELOC_CR16_DISP24a
@deffnx {} BFD_RELOC_CR16_DISP24a
@deffnx {} BFD_RELOC_CR16_SWITCH8
@deffnx {} BFD_RELOC_CR16_SWITCH8
@deffnx {} BFD_RELOC_CR16_SWITCH16
@deffnx {} BFD_RELOC_CR16_SWITCH16
@deffnx {} BFD_RELOC_CR16_SWITCH32
@deffnx {} BFD_RELOC_CR16_SWITCH32
 
@deffnx {} BFD_RELOC_CR16_GOT_REGREL20
 
@deffnx {} BFD_RELOC_CR16_GOTC_REGREL20
 
@deffnx {} BFD_RELOC_CR16_GLOB_DAT
NS CR16 Relocations.
NS CR16 Relocations.
@end deffn
@end deffn
@deffn {} BFD_RELOC_CRX_REL4
@deffn {} BFD_RELOC_CRX_REL4
@deffnx {} BFD_RELOC_CRX_REL8
@deffnx {} BFD_RELOC_CRX_REL8
@deffnx {} BFD_RELOC_CRX_REL8_CMP
@deffnx {} BFD_RELOC_CRX_REL8_CMP
Line 2377... Line 2436...
32-bit offset to symbol with PLT entry, relative to GOT.
32-bit offset to symbol with PLT entry, relative to GOT.
@end deffn
@end deffn
@deffn {} BFD_RELOC_CRIS_32_PLT_PCREL
@deffn {} BFD_RELOC_CRIS_32_PLT_PCREL
32-bit offset to symbol with PLT entry, relative to this relocation.
32-bit offset to symbol with PLT entry, relative to this relocation.
@end deffn
@end deffn
 
@deffn {} BFD_RELOC_CRIS_32_GOT_GD
 
@deffnx {} BFD_RELOC_CRIS_16_GOT_GD
 
@deffnx {} BFD_RELOC_CRIS_32_GD
 
@deffnx {} BFD_RELOC_CRIS_DTP
 
@deffnx {} BFD_RELOC_CRIS_32_DTPREL
 
@deffnx {} BFD_RELOC_CRIS_16_DTPREL
 
@deffnx {} BFD_RELOC_CRIS_32_GOT_TPREL
 
@deffnx {} BFD_RELOC_CRIS_16_GOT_TPREL
 
@deffnx {} BFD_RELOC_CRIS_32_TPREL
 
@deffnx {} BFD_RELOC_CRIS_16_TPREL
 
@deffnx {} BFD_RELOC_CRIS_DTPMOD
 
@deffnx {} BFD_RELOC_CRIS_32_IE
 
Relocs used in TLS code for CRIS.
 
@end deffn
@deffn {} BFD_RELOC_860_COPY
@deffn {} BFD_RELOC_860_COPY
@deffnx {} BFD_RELOC_860_GLOB_DAT
@deffnx {} BFD_RELOC_860_GLOB_DAT
@deffnx {} BFD_RELOC_860_JUMP_SLOT
@deffnx {} BFD_RELOC_860_JUMP_SLOT
@deffnx {} BFD_RELOC_860_RELATIVE
@deffnx {} BFD_RELOC_860_RELATIVE
@deffnx {} BFD_RELOC_860_PC26
@deffnx {} BFD_RELOC_860_PC26
Line 2553... Line 2626...
Xtensa relocation to mark that the linker should simplify
Xtensa relocation to mark that the linker should simplify
assembler-expanded instructions.  This is commonly used
assembler-expanded instructions.  This is commonly used
internally by the linker after analysis of a
internally by the linker after analysis of a
BFD_RELOC_XTENSA_ASM_EXPAND.
BFD_RELOC_XTENSA_ASM_EXPAND.
@end deffn
@end deffn
 
@deffn {} BFD_RELOC_XTENSA_TLSDESC_FN
 
@deffnx {} BFD_RELOC_XTENSA_TLSDESC_ARG
 
@deffnx {} BFD_RELOC_XTENSA_TLS_DTPOFF
 
@deffnx {} BFD_RELOC_XTENSA_TLS_TPOFF
 
@deffnx {} BFD_RELOC_XTENSA_TLS_FUNC
 
@deffnx {} BFD_RELOC_XTENSA_TLS_ARG
 
@deffnx {} BFD_RELOC_XTENSA_TLS_CALL
 
Xtensa TLS relocations.
 
@end deffn
@deffn {} BFD_RELOC_Z80_DISP8
@deffn {} BFD_RELOC_Z80_DISP8
8 bit signed offset in (ix+d) or (iy+d).
8 bit signed offset in (ix+d) or (iy+d).
@end deffn
@end deffn
@deffn {} BFD_RELOC_Z8K_DISP7
@deffn {} BFD_RELOC_Z8K_DISP7
DJNZ offset.
DJNZ offset.
Line 2565... Line 2647...
CALR offset.
CALR offset.
@end deffn
@end deffn
@deffn {} BFD_RELOC_Z8K_IMM4L
@deffn {} BFD_RELOC_Z8K_IMM4L
4 bit value.
4 bit value.
@end deffn
@end deffn
 
@deffn {} BFD_RELOC_LM32_CALL
 
@deffnx {} BFD_RELOC_LM32_BRANCH
 
@deffnx {} BFD_RELOC_LM32_16_GOT
 
@deffnx {} BFD_RELOC_LM32_GOTOFF_HI16
 
@deffnx {} BFD_RELOC_LM32_GOTOFF_LO16
 
@deffnx {} BFD_RELOC_LM32_COPY
 
@deffnx {} BFD_RELOC_LM32_GLOB_DAT
 
@deffnx {} BFD_RELOC_LM32_JMP_SLOT
 
@deffnx {} BFD_RELOC_LM32_RELATIVE
 
Lattice Mico32 relocations.
 
@end deffn
 
@deffn {} BFD_RELOC_MACH_O_SECTDIFF
 
Difference between two section addreses.  Must be followed by a
 
BFD_RELOC_MACH_O_PAIR.
 
@end deffn
 
@deffn {} BFD_RELOC_MACH_O_PAIR
 
Mach-O generic relocations.
 
@end deffn
 
@deffn {} BFD_RELOC_MICROBLAZE_32_LO
 
This is a 32 bit reloc for the microblaze that stores the
 
low 16 bits of a value
 
@end deffn
 
@deffn {} BFD_RELOC_MICROBLAZE_32_LO_PCREL
 
This is a 32 bit pc-relative reloc for the microblaze that
 
stores the low 16 bits of a value
 
@end deffn
 
@deffn {} BFD_RELOC_MICROBLAZE_32_ROSDA
 
This is a 32 bit reloc for the microblaze that stores a
 
value relative to the read-only small data area anchor
 
@end deffn
 
@deffn {} BFD_RELOC_MICROBLAZE_32_RWSDA
 
This is a 32 bit reloc for the microblaze that stores a
 
value relative to the read-write small data area anchor
 
@end deffn
 
@deffn {} BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM
 
This is a 32 bit reloc for the microblaze to handle
 
expressions of the form "Symbol Op Symbol"
 
@end deffn
 
@deffn {} BFD_RELOC_MICROBLAZE_64_NONE
 
This is a 64 bit reloc that stores the 32 bit pc relative
 
value in two words (with an imm instruction).  No relocation is
 
done here - only used for relaxing
 
@end deffn
 
@deffn {} BFD_RELOC_MICROBLAZE_64_GOTPC
 
This is a 64 bit reloc that stores the 32 bit pc relative
 
value in two words (with an imm instruction).  The relocation is
 
PC-relative GOT offset
 
@end deffn
 
@deffn {} BFD_RELOC_MICROBLAZE_64_GOT
 
This is a 64 bit reloc that stores the 32 bit pc relative
 
value in two words (with an imm instruction).  The relocation is
 
GOT offset
 
@end deffn
 
@deffn {} BFD_RELOC_MICROBLAZE_64_PLT
 
This is a 64 bit reloc that stores the 32 bit pc relative
 
value in two words (with an imm instruction).  The relocation is
 
PC-relative offset into PLT
 
@end deffn
 
@deffn {} BFD_RELOC_MICROBLAZE_64_GOTOFF
 
This is a 64 bit reloc that stores the 32 bit GOT relative
 
value in two words (with an imm instruction).  The relocation is
 
relative offset from _GLOBAL_OFFSET_TABLE_
 
@end deffn
 
@deffn {} BFD_RELOC_MICROBLAZE_32_GOTOFF
 
This is a 32 bit reloc that stores the 32 bit GOT relative
 
value in a word.  The relocation is relative offset from
 
@end deffn
 
@deffn {} BFD_RELOC_MICROBLAZE_COPY
 
This is used to tell the dynamic linker to copy the value out of
 
the dynamic object into the runtime process image.
 
@end deffn
 
 
@example
@example
 
 
typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
@end example
@end example

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