OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [include/] [opcode/] [arm.h] - Diff between revs 157 and 225

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 157 Rev 225
Line 42... Line 42... 
#define ARM_EXT_V6_NOTM  0x00040000     /* Arm V6 but not Arm V7M. */
 
#define ARM_EXT_V6_NOTM  0x00040000     /* Arm V6 but not Arm V7M. */
 
#define ARM_EXT_V7       0x00080000     /* Arm V7.                 */
 
#define ARM_EXT_V7       0x00080000     /* Arm V7.                 */
 
#define ARM_EXT_V7A      0x00100000     /* Arm V7A.                */
 
#define ARM_EXT_V7A      0x00100000     /* Arm V7A.                */
 
#define ARM_EXT_V7R      0x00200000     /* Arm V7R.                */
 
#define ARM_EXT_V7R      0x00200000     /* Arm V7R.                */
 
#define ARM_EXT_V7M      0x00400000     /* Arm V7M.                */
 
#define ARM_EXT_V7M      0x00400000     /* Arm V7M.                */
 
 
 
#define ARM_EXT_V6M      0x00800000     /* ARM V6M.                 */
 
 
 
#define ARM_EXT_BARRIER  0x01000000     /* DSB/DMB/ISB.             */
 
 
 
#define ARM_EXT_THUMB_MSR 0x02000000    /* Thumb MSR/MRS.           */
 
 
 
 
 
/* Co-processor space extensions.  */
 
/* Co-processor space extensions.  */
 
#define ARM_CEXT_XSCALE   0x00000001    /* Allow MIA etc.          */
 
#define ARM_CEXT_XSCALE   0x00000001    /* Allow MIA etc.          */
 
#define ARM_CEXT_MAVERICK 0x00000002    /* Use Cirrus/DSP coprocessor.  */
 
#define ARM_CEXT_MAVERICK 0x00000002    /* Use Cirrus/DSP coprocessor.  */
 
#define ARM_CEXT_IWMMXT   0x00000004    /* Intel Wireless MMX technology coprocessor.   */
 
#define ARM_CEXT_IWMMXT   0x00000004    /* Intel Wireless MMX technology coprocessor.   */
Line 59... Line 62... 
#define FPU_VFP_EXT_V1xD 0x08000000     /* Base VFP instruction set.  */
 
#define FPU_VFP_EXT_V1xD 0x08000000     /* Base VFP instruction set.  */
 
#define FPU_VFP_EXT_V1   0x04000000     /* Double-precision insns.    */
 
#define FPU_VFP_EXT_V1   0x04000000     /* Double-precision insns.    */
 
#define FPU_VFP_EXT_V2   0x02000000     /* ARM10E VFPr1.              */
 
#define FPU_VFP_EXT_V2   0x02000000     /* ARM10E VFPr1.              */
 
#define FPU_VFP_EXT_V3   0x01000000     /* VFPv3 insns.               */
 
#define FPU_VFP_EXT_V3   0x01000000     /* VFPv3 insns.               */
 
#define FPU_NEON_EXT_V1  0x00800000     /* Neon (SIMD) insns.         */
 
#define FPU_NEON_EXT_V1  0x00800000     /* Neon (SIMD) insns.         */
 
 
 
#define FPU_VFP_EXT_D32  0x00400000     /* Registers D16-D31.         */
 
 
 
#define FPU_NEON_FP16    0x00200000     /* Half-precision extensions. */
 
 
 
 
 
/* Architectures are the sum of the base and extensions.  The ARM ARM (rev E)
 
/* Architectures are the sum of the base and extensions.  The ARM ARM (rev E)
 
   defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
 
   defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
 
   ARMv5xM, ARMv5, ARMv5TxM, ARMv5T, ARMv5TExP, ARMv5TE.  To these we add
 
   ARMv5xM, ARMv5, ARMv5TxM, ARMv5T, ARMv5TExP, ARMv5TE.  To these we add
 
   three more to cover cores prior to ARM6.  Finally, there are cores which
 
   three more to cover cores prior to ARM6.  Finally, there are cores which
Line 85... Line 90... 
#define ARM_AEXT_V5TEJ  (ARM_AEXT_V5TE  | ARM_EXT_V5J)
 
#define ARM_AEXT_V5TEJ  (ARM_AEXT_V5TE  | ARM_EXT_V5J)
 
#define ARM_AEXT_V6     (ARM_AEXT_V5TEJ | ARM_EXT_V6)
 
#define ARM_AEXT_V6     (ARM_AEXT_V5TEJ | ARM_EXT_V6)
 
#define ARM_AEXT_V6K    (ARM_AEXT_V6    | ARM_EXT_V6K)
 
#define ARM_AEXT_V6K    (ARM_AEXT_V6    | ARM_EXT_V6K)
 
#define ARM_AEXT_V6Z    (ARM_AEXT_V6    | ARM_EXT_V6Z)
 
#define ARM_AEXT_V6Z    (ARM_AEXT_V6    | ARM_EXT_V6Z)
 
#define ARM_AEXT_V6ZK   (ARM_AEXT_V6    | ARM_EXT_V6K | ARM_EXT_V6Z)
 
#define ARM_AEXT_V6ZK   (ARM_AEXT_V6    | ARM_EXT_V6K | ARM_EXT_V6Z)
 
#define ARM_AEXT_V6T2   (ARM_AEXT_V6    | ARM_EXT_V6T2 | ARM_EXT_V6_NOTM)
 
#define ARM_AEXT_V6T2   (ARM_AEXT_V6 \
 
 
 
    | ARM_EXT_V6T2 | ARM_EXT_V6_NOTM | ARM_EXT_THUMB_MSR)
 
#define ARM_AEXT_V6KT2  (ARM_AEXT_V6T2 | ARM_EXT_V6K)
 
#define ARM_AEXT_V6KT2  (ARM_AEXT_V6T2 | ARM_EXT_V6K)
 
#define ARM_AEXT_V6ZT2  (ARM_AEXT_V6T2 | ARM_EXT_V6Z)
 
#define ARM_AEXT_V6ZT2  (ARM_AEXT_V6T2 | ARM_EXT_V6Z)
 
#define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_V6Z)
 
#define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_V6Z)
 
#define ARM_AEXT_V7_ARM (ARM_AEXT_V6ZKT2 | ARM_EXT_V7)
 
#define ARM_AEXT_V7_ARM (ARM_AEXT_V6ZKT2 | ARM_EXT_V7 | ARM_EXT_BARRIER)
 
#define ARM_AEXT_V7A    (ARM_AEXT_V7_ARM | ARM_EXT_V7A)
 
#define ARM_AEXT_V7A    (ARM_AEXT_V7_ARM | ARM_EXT_V7A)
 
#define ARM_AEXT_V7R    (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV)
 
#define ARM_AEXT_V7R    (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV)
 
#define ARM_AEXT_NOTM \
 
#define ARM_AEXT_NOTM \
 
  (ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J | ARM_EXT_V6_NOTM)
 
  (ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J | ARM_EXT_V6_NOTM)
 
 
 
#define ARM_AEXT_V6M \
 
 
 
  ((ARM_AEXT_V6K | ARM_EXT_BARRIER | ARM_EXT_V6M | ARM_EXT_THUMB_MSR) \
 
 
 
   & ~(ARM_AEXT_NOTM))
 
#define ARM_AEXT_V7M \
 
#define ARM_AEXT_V7M \
 
  ((ARM_AEXT_V7_ARM | ARM_EXT_V7M | ARM_EXT_DIV) & ~(ARM_AEXT_NOTM))
 
  ((ARM_AEXT_V7_ARM | ARM_EXT_V6M | ARM_EXT_V7M | ARM_EXT_DIV) \
 
 
 
   & ~(ARM_AEXT_NOTM))
 
#define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M)
 
#define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M)
 
 
 
 
 
/* Processors with specific extensions in the co-processor space.  */
 
/* Processors with specific extensions in the co-processor space.  */
 
#define ARM_ARCH_XSCALE ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE)
 
#define ARM_ARCH_XSCALE ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE)
 
#define ARM_ARCH_IWMMXT \
 
#define ARM_ARCH_IWMMXT \
Line 108... Line 118... 
 ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT | ARM_CEXT_IWMMXT2)
 
 ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT | ARM_CEXT_IWMMXT2)
 
 
 
 
 
#define FPU_VFP_V1xD    (FPU_VFP_EXT_V1xD | FPU_ENDIAN_PURE)
 
#define FPU_VFP_V1xD    (FPU_VFP_EXT_V1xD | FPU_ENDIAN_PURE)
 
#define FPU_VFP_V1      (FPU_VFP_V1xD | FPU_VFP_EXT_V1)
 
#define FPU_VFP_V1      (FPU_VFP_V1xD | FPU_VFP_EXT_V1)
 
#define FPU_VFP_V2      (FPU_VFP_V1 | FPU_VFP_EXT_V2)
 
#define FPU_VFP_V2      (FPU_VFP_V1 | FPU_VFP_EXT_V2)
 
#define FPU_VFP_V3      (FPU_VFP_V2 | FPU_VFP_EXT_V3)
 
#define FPU_VFP_V3D16   (FPU_VFP_V2 | FPU_VFP_EXT_V3)
 
 
 
#define FPU_VFP_V3      (FPU_VFP_V3D16 | FPU_VFP_EXT_D32)
 
#define FPU_VFP_HARD    (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 | FPU_VFP_EXT_V2 \
 
#define FPU_VFP_HARD    (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 | FPU_VFP_EXT_V2 \
 
                         | FPU_VFP_EXT_V3 | FPU_NEON_EXT_V1)
 
                         | FPU_VFP_EXT_V3 | FPU_NEON_EXT_V1 | FPU_VFP_EXT_D32)
 
#define FPU_FPA         (FPU_FPA_EXT_V1 | FPU_FPA_EXT_V2)
 
#define FPU_FPA         (FPU_FPA_EXT_V1 | FPU_FPA_EXT_V2)
 
 
 
 
 
/* Deprecated */
 
/* Deprecated */
 
#define FPU_ARCH_VFP    ARM_FEATURE (0, FPU_ENDIAN_PURE)
 
#define FPU_ARCH_VFP    ARM_FEATURE (0, FPU_ENDIAN_PURE)
 
 
 
 
Line 122... Line 133... 
#define FPU_ARCH_FPA    ARM_FEATURE (0, FPU_FPA)
 
#define FPU_ARCH_FPA    ARM_FEATURE (0, FPU_FPA)
 
 
 
 
 
#define FPU_ARCH_VFP_V1xD ARM_FEATURE (0, FPU_VFP_V1xD)
 
#define FPU_ARCH_VFP_V1xD ARM_FEATURE (0, FPU_VFP_V1xD)
 
#define FPU_ARCH_VFP_V1   ARM_FEATURE (0, FPU_VFP_V1)
 
#define FPU_ARCH_VFP_V1   ARM_FEATURE (0, FPU_VFP_V1)
 
#define FPU_ARCH_VFP_V2   ARM_FEATURE (0, FPU_VFP_V2)
 
#define FPU_ARCH_VFP_V2   ARM_FEATURE (0, FPU_VFP_V2)
 
 
 
#define FPU_ARCH_VFP_V3D16      ARM_FEATURE (0, FPU_VFP_V3D16)
 
#define FPU_ARCH_VFP_V3   ARM_FEATURE (0, FPU_VFP_V3)
 
#define FPU_ARCH_VFP_V3   ARM_FEATURE (0, FPU_VFP_V3)
 
#define FPU_ARCH_NEON_V1  ARM_FEATURE (0, FPU_NEON_EXT_V1)
 
#define FPU_ARCH_NEON_V1  ARM_FEATURE (0, FPU_NEON_EXT_V1)
 
#define FPU_ARCH_VFP_V3_PLUS_NEON_V1 \
 
#define FPU_ARCH_VFP_V3_PLUS_NEON_V1 \
 
  ARM_FEATURE (0, FPU_VFP_V3 | FPU_NEON_EXT_V1)
 
  ARM_FEATURE (0, FPU_VFP_V3 | FPU_NEON_EXT_V1)
 
 
 
#define FPU_ARCH_NEON_FP16 \
 
 
 
  ARM_FEATURE (0, FPU_VFP_V3 | FPU_NEON_EXT_V1 | FPU_NEON_FP16)
 
#define FPU_ARCH_VFP_HARD ARM_FEATURE (0, FPU_VFP_HARD)
 
#define FPU_ARCH_VFP_HARD ARM_FEATURE (0, FPU_VFP_HARD)
 
 
 
 
 
#define FPU_ARCH_ENDIAN_PURE ARM_FEATURE (0, FPU_ENDIAN_PURE)
 
#define FPU_ARCH_ENDIAN_PURE ARM_FEATURE (0, FPU_ENDIAN_PURE)
 
 
 
 
 
#define FPU_ARCH_MAVERICK ARM_FEATURE (0, FPU_MAVERICK)
 
#define FPU_ARCH_MAVERICK ARM_FEATURE (0, FPU_MAVERICK)
Line 156... Line 170... 
#define ARM_ARCH_V6ZK   ARM_FEATURE (ARM_AEXT_V6ZK, 0)
 
#define ARM_ARCH_V6ZK   ARM_FEATURE (ARM_AEXT_V6ZK, 0)
 
#define ARM_ARCH_V6T2   ARM_FEATURE (ARM_AEXT_V6T2, 0)
 
#define ARM_ARCH_V6T2   ARM_FEATURE (ARM_AEXT_V6T2, 0)
 
#define ARM_ARCH_V6KT2  ARM_FEATURE (ARM_AEXT_V6KT2, 0)
 
#define ARM_ARCH_V6KT2  ARM_FEATURE (ARM_AEXT_V6KT2, 0)
 
#define ARM_ARCH_V6ZT2  ARM_FEATURE (ARM_AEXT_V6ZT2, 0)
 
#define ARM_ARCH_V6ZT2  ARM_FEATURE (ARM_AEXT_V6ZT2, 0)
 
#define ARM_ARCH_V6ZKT2 ARM_FEATURE (ARM_AEXT_V6ZKT2, 0)
 
#define ARM_ARCH_V6ZKT2 ARM_FEATURE (ARM_AEXT_V6ZKT2, 0)
 
 
 
#define ARM_ARCH_V6M    ARM_FEATURE (ARM_AEXT_V6M, 0)
 
#define ARM_ARCH_V7     ARM_FEATURE (ARM_AEXT_V7, 0)
 
#define ARM_ARCH_V7     ARM_FEATURE (ARM_AEXT_V7, 0)
 
#define ARM_ARCH_V7A    ARM_FEATURE (ARM_AEXT_V7A, 0)
 
#define ARM_ARCH_V7A    ARM_FEATURE (ARM_AEXT_V7A, 0)
 
#define ARM_ARCH_V7R    ARM_FEATURE (ARM_AEXT_V7R, 0)
 
#define ARM_ARCH_V7R    ARM_FEATURE (ARM_AEXT_V7R, 0)
 
#define ARM_ARCH_V7M    ARM_FEATURE (ARM_AEXT_V7M, 0)
 
#define ARM_ARCH_V7M    ARM_FEATURE (ARM_AEXT_V7M, 0)
 
 
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.