URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [include/] [xtensa-config.h] - Diff between revs 157 and 225

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Rev 157	Rev 225
Line 1...	Line 1...
`/* Xtensa configuration settings.`	`/* Xtensa configuration settings.`
`Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007`	`Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008`
`Free Software Foundation, Inc.`	`Free Software Foundation, Inc.`
`Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.`	`Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.`

`This program is free software; you can redistribute it and/or modify`	`This program is free software; you can redistribute it and/or modify`
`it under the terms of the GNU General Public License as published by`	`it under the terms of the GNU General Public License as published by`
Line 48...	Line 48...

`#undef XCHAL_HAVE_MAC16`	`#undef XCHAL_HAVE_MAC16`
`#define XCHAL_HAVE_MAC16 0`	`#define XCHAL_HAVE_MAC16 0`

`#undef XCHAL_HAVE_MUL16`	`#undef XCHAL_HAVE_MUL16`
`#define XCHAL_HAVE_MUL16 0`	`#define XCHAL_HAVE_MUL16 1`

`#undef XCHAL_HAVE_MUL32`	`#undef XCHAL_HAVE_MUL32`
`#define XCHAL_HAVE_MUL32 0`	`#define XCHAL_HAVE_MUL32 1`

`#undef XCHAL_HAVE_MUL32_HIGH`	`#undef XCHAL_HAVE_MUL32_HIGH`
`#define XCHAL_HAVE_MUL32_HIGH 0`	`#define XCHAL_HAVE_MUL32_HIGH 0`

`#undef XCHAL_HAVE_DIV32`	`#undef XCHAL_HAVE_DIV32`
`#define XCHAL_HAVE_DIV32 0`	`#define XCHAL_HAVE_DIV32 1`

`#undef XCHAL_HAVE_NSA`	`#undef XCHAL_HAVE_NSA`
`#define XCHAL_HAVE_NSA 1`	`#define XCHAL_HAVE_NSA 1`

`#undef XCHAL_HAVE_MINMAX`	`#undef XCHAL_HAVE_MINMAX`
`#define XCHAL_HAVE_MINMAX 0`	`#define XCHAL_HAVE_MINMAX 1`

`#undef XCHAL_HAVE_SEXT`	`#undef XCHAL_HAVE_SEXT`
`#define XCHAL_HAVE_SEXT 0`	`#define XCHAL_HAVE_SEXT 1`

`#undef XCHAL_HAVE_LOOPS`	`#undef XCHAL_HAVE_LOOPS`
`#define XCHAL_HAVE_LOOPS 1`	`#define XCHAL_HAVE_LOOPS 1`

`#undef XCHAL_HAVE_THREADPTR`	`#undef XCHAL_HAVE_THREADPTR`
`#define XCHAL_HAVE_THREADPTR 0`	`#define XCHAL_HAVE_THREADPTR 1`

`#undef XCHAL_HAVE_RELEASE_SYNC`	`#undef XCHAL_HAVE_RELEASE_SYNC`
`#define XCHAL_HAVE_RELEASE_SYNC 0`	`#define XCHAL_HAVE_RELEASE_SYNC 1`

`#undef XCHAL_HAVE_S32C1I`	`#undef XCHAL_HAVE_S32C1I`
`#define XCHAL_HAVE_S32C1I 0`	`#define XCHAL_HAVE_S32C1I 1`

`#undef XCHAL_HAVE_BOOLEANS`	`#undef XCHAL_HAVE_BOOLEANS`
`#define XCHAL_HAVE_BOOLEANS 0`	`#define XCHAL_HAVE_BOOLEANS 0`

`#undef XCHAL_HAVE_FP`	`#undef XCHAL_HAVE_FP`
Line 102...	Line 102...

`#undef XCHAL_HAVE_WINDOWED`	`#undef XCHAL_HAVE_WINDOWED`
`#define XCHAL_HAVE_WINDOWED 1`	`#define XCHAL_HAVE_WINDOWED 1`

`#undef XCHAL_NUM_AREGS`	`#undef XCHAL_NUM_AREGS`
`#define XCHAL_NUM_AREGS 64`	`#define XCHAL_NUM_AREGS 32`

`#undef XCHAL_HAVE_WIDE_BRANCHES`	`#undef XCHAL_HAVE_WIDE_BRANCHES`
`#define XCHAL_HAVE_WIDE_BRANCHES 0`	`#define XCHAL_HAVE_WIDE_BRANCHES 0`

`#undef XCHAL_HAVE_PREDICTED_BRANCHES`	`#undef XCHAL_HAVE_PREDICTED_BRANCHES`
`#define XCHAL_HAVE_PREDICTED_BRANCHES 0`	`#define XCHAL_HAVE_PREDICTED_BRANCHES 0`


`#undef XCHAL_ICACHE_SIZE`	`#undef XCHAL_ICACHE_SIZE`
`#define XCHAL_ICACHE_SIZE 8192`	`#define XCHAL_ICACHE_SIZE 16384`

`#undef XCHAL_DCACHE_SIZE`	`#undef XCHAL_DCACHE_SIZE`
`#define XCHAL_DCACHE_SIZE 8192`	`#define XCHAL_DCACHE_SIZE 16384`

`#undef XCHAL_ICACHE_LINESIZE`	`#undef XCHAL_ICACHE_LINESIZE`
`#define XCHAL_ICACHE_LINESIZE 16`	`#define XCHAL_ICACHE_LINESIZE 32`

`#undef XCHAL_DCACHE_LINESIZE`	`#undef XCHAL_DCACHE_LINESIZE`
`#define XCHAL_DCACHE_LINESIZE 16`	`#define XCHAL_DCACHE_LINESIZE 32`

`#undef XCHAL_ICACHE_LINEWIDTH`	`#undef XCHAL_ICACHE_LINEWIDTH`
`#define XCHAL_ICACHE_LINEWIDTH 4`	`#define XCHAL_ICACHE_LINEWIDTH 5`

`#undef XCHAL_DCACHE_LINEWIDTH`	`#undef XCHAL_DCACHE_LINEWIDTH`
`#define XCHAL_DCACHE_LINEWIDTH 4`	`#define XCHAL_DCACHE_LINEWIDTH 5`

`#undef XCHAL_DCACHE_IS_WRITEBACK`	`#undef XCHAL_DCACHE_IS_WRITEBACK`
`#define XCHAL_DCACHE_IS_WRITEBACK 0`	`#define XCHAL_DCACHE_IS_WRITEBACK 1`


`#undef XCHAL_HAVE_MMU`	`#undef XCHAL_HAVE_MMU`
`#define XCHAL_HAVE_MMU 1`	`#define XCHAL_HAVE_MMU 1`

Line 150...	Line 150...

`#undef XCHAL_NUM_DBREAK`	`#undef XCHAL_NUM_DBREAK`
`#define XCHAL_NUM_DBREAK 2`	`#define XCHAL_NUM_DBREAK 2`

`#undef XCHAL_DEBUGLEVEL`	`#undef XCHAL_DEBUGLEVEL`
`#define XCHAL_DEBUGLEVEL 4`	`#define XCHAL_DEBUGLEVEL 6`


`#undef XCHAL_MAX_INSTRUCTION_SIZE`	`#undef XCHAL_MAX_INSTRUCTION_SIZE`
`#define XCHAL_MAX_INSTRUCTION_SIZE 3`	`#define XCHAL_MAX_INSTRUCTION_SIZE 3`

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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [include/] [xtensa-config.h] - Diff between revs 157 and 225