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/* Table of opcodes for the sparc.
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/* Table of opcodes for the sparc.
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Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
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Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
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2000, 2002, 2004, 2005, 2007
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2000, 2002, 2004, 2005, 2006, 2007, 2008
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Free Software Foundation, Inc.
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Free Software Foundation, Inc.
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This file is part of the GNU opcodes library.
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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This library is free software; you can redistribute it and/or modify
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{ 0x83, "#ASI_SECONDARY_NOFAULT" },
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{ 0x83, "#ASI_SECONDARY_NOFAULT" },
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{ 0x88, "#ASI_PRIMARY_LITTLE" },
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{ 0x88, "#ASI_PRIMARY_LITTLE" },
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{ 0x89, "#ASI_SECONDARY_LITTLE" },
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{ 0x89, "#ASI_SECONDARY_LITTLE" },
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{ 0x8a, "#ASI_PRIMARY_NOFAULT_LITTLE" },
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{ 0x8a, "#ASI_PRIMARY_NOFAULT_LITTLE" },
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{ 0x8b, "#ASI_SECONDARY_NOFAULT_LITTLE" },
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{ 0x8b, "#ASI_SECONDARY_NOFAULT_LITTLE" },
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/* These are UltraSPARC extensions. */
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/* These are UltraSPARC and Niagara extensions. */
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/* FIXME: There are dozens of them. Not sure we want them all.
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{ 0x14, "#ASI_PHYS_USE_EC" },
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Most are for kernel building but some are for vis type stuff. */
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{ 0x15, "#ASI_PHYS_BYPASS_EC_E" },
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{ 0x16, "#ASI_BLK_AIUP_4V" },
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{ 0x17, "#ASI_BLK_AIUS_4V" },
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{ 0x1c, "#ASI_PHYS_USE_EC_L" },
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{ 0x1d, "#ASI_PHYS_BYPASS_EC_E_L" },
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{ 0x1e, "#ASI_BLK_AIUP_L_4V" },
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{ 0x1f, "#ASI_BLK_AIUS_L_4V" },
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{ 0x20, "#ASI_SCRATCHPAD" },
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{ 0x21, "#ASI_MMU" },
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{ 0x23, "#ASI_BLK_INIT_QUAD_LDD_AIUS" },
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{ 0x24, "#ASI_NUCLEUS_QUAD_LDD" },
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{ 0x25, "#ASI_QUEUE" },
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{ 0x26, "#ASI_QUAD_LDD_PHYS_4V" },
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{ 0x2c, "#ASI_NUCLEUS_QUAD_LDD_L" },
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{ 0x30, "#ASI_PCACHE_DATA_STATUS" },
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{ 0x31, "#ASI_PCACHE_DATA" },
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{ 0x32, "#ASI_PCACHE_TAG" },
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{ 0x33, "#ASI_PCACHE_SNOOP_TAG" },
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{ 0x34, "#ASI_QUAD_LDD_PHYS" },
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{ 0x38, "#ASI_WCACHE_VALID_BITS" },
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{ 0x39, "#ASI_WCACHE_DATA" },
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{ 0x3a, "#ASI_WCACHE_TAG" },
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{ 0x3b, "#ASI_WCACHE_SNOOP_TAG" },
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{ 0x3c, "#ASI_QUAD_LDD_PHYS_L" },
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{ 0x40, "#ASI_SRAM_FAST_INIT" },
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{ 0x41, "#ASI_CORE_AVAILABLE" },
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{ 0x41, "#ASI_CORE_ENABLE_STAT" },
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{ 0x41, "#ASI_CORE_ENABLE" },
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{ 0x41, "#ASI_XIR_STEERING" },
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{ 0x41, "#ASI_CORE_RUNNING_RW" },
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{ 0x41, "#ASI_CORE_RUNNING_W1S" },
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{ 0x41, "#ASI_CORE_RUNNING_W1C" },
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{ 0x41, "#ASI_CORE_RUNNING_STAT" },
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{ 0x41, "#ASI_CMT_ERROR_STEERING" },
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{ 0x41, "#ASI_DCACHE_INVALIDATE" },
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{ 0x41, "#ASI_DCACHE_UTAG" },
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{ 0x41, "#ASI_DCACHE_SNOOP_TAG" },
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{ 0x42, "#ASI_DCACHE_INVALIDATE" },
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{ 0x43, "#ASI_DCACHE_UTAG" },
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{ 0x44, "#ASI_DCACHE_SNOOP_TAG" },
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{ 0x45, "#ASI_LSU_CONTROL_REG" },
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{ 0x45, "#ASI_DCU_CONTROL_REG" },
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{ 0x46, "#ASI_DCACHE_DATA" },
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{ 0x47, "#ASI_DCACHE_TAG" },
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{ 0x48, "#ASI_INTR_DISPATCH_STAT" },
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{ 0x49, "#ASI_INTR_RECEIVE" },
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{ 0x4a, "#ASI_UPA_CONFIG" },
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{ 0x4a, "#ASI_JBUS_CONFIG" },
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{ 0x4a, "#ASI_SAFARI_CONFIG" },
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{ 0x4a, "#ASI_SAFARI_ADDRESS" },
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{ 0x4b, "#ASI_ESTATE_ERROR_EN" },
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{ 0x4c, "#ASI_AFSR" },
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{ 0x4d, "#ASI_AFAR" },
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{ 0x4e, "#ASI_EC_TAG_DATA" },
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{ 0x50, "#ASI_IMMU" },
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{ 0x51, "#ASI_IMMU_TSB_8KB_PTR" },
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{ 0x52, "#ASI_IMMU_TSB_16KB_PTR" },
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{ 0x54, "#ASI_ITLB_DATA_IN" },
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{ 0x55, "#ASI_ITLB_DATA_ACCESS" },
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{ 0x56, "#ASI_ITLB_TAG_READ" },
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{ 0x57, "#ASI_IMMU_DEMAP" },
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{ 0x58, "#ASI_DMMU" },
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{ 0x59, "#ASI_DMMU_TSB_8KB_PTR" },
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{ 0x5a, "#ASI_DMMU_TSB_64KB_PTR" },
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{ 0x5b, "#ASI_DMMU_TSB_DIRECT_PTR" },
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{ 0x5c, "#ASI_DTLB_DATA_IN" },
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{ 0x5d, "#ASI_DTLB_DATA_ACCESS" },
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{ 0x5e, "#ASI_DTLB_TAG_READ" },
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{ 0x5f, "#ASI_DMMU_DEMAP" },
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{ 0x60, "#ASI_IIU_INST_TRAP" },
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{ 0x63, "#ASI_INTR_ID" },
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{ 0x63, "#ASI_CORE_ID" },
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{ 0x63, "#ASI_CESR_ID" },
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{ 0x66, "#ASI_IC_INSTR" },
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{ 0x67, "#ASI_IC_TAG" },
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{ 0x68, "#ASI_IC_STAG" },
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{ 0x6e, "#ASI_IC_PRE_DECODE" },
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{ 0x6f, "#ASI_IC_NEXT_FIELD" },
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{ 0x6f, "#ASI_BRPRED_ARRAY" },
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{ 0x70, "#ASI_BLK_AIUP" },
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{ 0x71, "#ASI_BLK_AIUS" },
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{ 0x72, "#ASI_MCU_CTRL_REG" },
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{ 0x74, "#ASI_EC_DATA" },
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{ 0x75, "#ASI_EC_CTRL" },
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{ 0x76, "#ASI_EC_W" },
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{ 0x77, "#ASI_UDB_ERROR_W" },
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{ 0x77, "#ASI_UDB_CONTROL_W" },
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{ 0x77, "#ASI_INTR_W" },
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{ 0x77, "#ASI_INTR_DATAN_W" },
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{ 0x77, "#ASI_INTR_DISPATCH_W" },
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{ 0x78, "#ASI_BLK_AIUPL" },
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{ 0x79, "#ASI_BLK_AIUSL" },
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{ 0x7e, "#ASI_EC_R" },
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{ 0x7f, "#ASI_UDBH_ERROR_R" },
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{ 0x7f, "#ASI_UDBL_ERROR_R" },
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{ 0x7f, "#ASI_UDBH_CONTROL_R" },
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{ 0x7f, "#ASI_UDBL_CONTROL_R" },
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{ 0x7f, "#ASI_INTR_R" },
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{ 0x7f, "#ASI_INTR_DATAN_R" },
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{ 0xc0, "#ASI_PST8_P" },
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{ 0xc1, "#ASI_PST8_S" },
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{ 0xc2, "#ASI_PST16_P" },
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{ 0xc3, "#ASI_PST16_S" },
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{ 0xc4, "#ASI_PST32_P" },
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{ 0xc5, "#ASI_PST32_S" },
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{ 0xc8, "#ASI_PST8_PL" },
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{ 0xc9, "#ASI_PST8_SL" },
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{ 0xca, "#ASI_PST16_PL" },
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{ 0xcb, "#ASI_PST16_SL" },
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{ 0xcc, "#ASI_PST32_PL" },
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{ 0xcd, "#ASI_PST32_SL" },
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{ 0xd0, "#ASI_FL8_P" },
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{ 0xd1, "#ASI_FL8_S" },
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{ 0xd2, "#ASI_FL16_P" },
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{ 0xd3, "#ASI_FL16_S" },
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{ 0xd8, "#ASI_FL8_PL" },
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{ 0xd9, "#ASI_FL8_SL" },
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{ 0xda, "#ASI_FL16_PL" },
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{ 0xdb, "#ASI_FL16_SL" },
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{ 0xe0, "#ASI_BLK_COMMIT_P", },
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{ 0xe1, "#ASI_BLK_COMMIT_S", },
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{ 0xe2, "#ASI_BLK_INIT_QUAD_LDD_P" },
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{ 0xf0, "#ASI_BLK_P", },
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{ 0xf1, "#ASI_BLK_S", },
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{ 0xf8, "#ASI_BLK_PL", },
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{ 0xf9, "#ASI_BLK_SL", },
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{ 0, 0 }
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{ 0, 0 }
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};
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};
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/* Return the value for ASI NAME, or -1 if not found. */
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/* Return the value for ASI NAME, or -1 if not found. */
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Line 2084... |
{ 1, "#one_read" },
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{ 1, "#one_read" },
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{ 2, "#n_writes" },
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{ 2, "#n_writes" },
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{ 3, "#one_write" },
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{ 3, "#one_write" },
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{ 4, "#page" },
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{ 4, "#page" },
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{ 16, "#invalidate" },
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{ 16, "#invalidate" },
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{ 17, "#unified", },
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{ 20, "#n_reads_strong", },
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{ 21, "#one_read_strong", },
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{ 22, "#n_writes_strong", },
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{ 23, "#one_write_strong", },
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{ 0, 0 }
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{ 0, 0 }
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};
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};
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/* Return the value for prefetch arg NAME, or -1 if not found. */
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/* Return the value for prefetch arg NAME, or -1 if not found. */
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