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/* Table of opcodes for the Texas Instruments TMS320C54X
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/* Table of opcodes for the Texas Instruments TMS320C54X
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Copyright 1999, 2000, 2001, 2007 Free Software Foundation, Inc.
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Copyright 1999, 2000, 2001, 2005, 2007, 2009 Free Software Foundation, Inc.
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Contributed by Timothy Wall (twall@cygnus.com)
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Contributed by Timothy Wall (twall@cygnus.com)
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This file is part of the GNU opcodes library.
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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This library is free software; you can redistribute it and/or modify
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symbol) version is checked first (marked "SRC").
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symbol) version is checked first (marked "SRC").
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*/
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*/
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#define ZPAR 0,{OP_None}
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#define ZPAR 0,{OP_None}
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#define REST 0,0,ZPAR
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#define REST 0,0,ZPAR
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#define XREST ZPAR
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#define XREST ZPAR
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const template tic54x_unknown_opcode =
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const insn_template tic54x_unknown_opcode =
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{ "???", 1,0,0,0x0000, 0x0000, {0}, 0, REST};
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{ "???", 1,0,0,0x0000, 0x0000, {0}, 0, REST};
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const template tic54x_optab[] = {
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const insn_template tic54x_optab[] = {
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/* these must precede bc/bcd, cc/ccd to avoid misinterpretation */
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/* these must precede bc/bcd, cc/ccd to avoid misinterpretation */
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{ "fb", 2,1,1,0xF880, 0xFF80, {OP_xpmad}, B_BRANCH|FL_FAR|FL_NR, REST},
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{ "fb", 2,1,1,0xF880, 0xFF80, {OP_xpmad}, B_BRANCH|FL_FAR|FL_NR, REST},
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{ "fbd", 2,1,1,0xFA80, 0xFF80, {OP_xpmad}, B_BRANCH|FL_FAR|FL_DELAY|FL_NR, REST},
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{ "fbd", 2,1,1,0xFA80, 0xFF80, {OP_xpmad}, B_BRANCH|FL_FAR|FL_DELAY|FL_NR, REST},
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{ "fcall", 2,1,1,0xF980, 0xFF80, {OP_xpmad}, B_BRANCH|FL_FAR|FL_NR, REST},
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{ "fcall", 2,1,1,0xF980, 0xFF80, {OP_xpmad}, B_BRANCH|FL_FAR|FL_NR, REST},
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{ "fcalld",2,1,1,0xFB80, 0xFF80, {OP_xpmad}, B_BRANCH|FL_FAR|FL_DELAY|FL_NR, REST},
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{ "fcalld",2,1,1,0xFB80, 0xFF80, {OP_xpmad}, B_BRANCH|FL_FAR|FL_DELAY|FL_NR, REST},
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{ "xorm", 2,2,2,0x6A00, 0xFF00, {OP_lku,OP_Smem}, FL_NR|FL_SMR, REST},
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{ "xorm", 2,2,2,0x6A00, 0xFF00, {OP_lku,OP_Smem}, FL_NR|FL_SMR, REST},
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{ NULL, 0,0,0,0,0, {}, 0, REST},
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{ NULL, 0,0,0,0,0, {}, 0, REST},
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};
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};
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/* assume all parallel instructions have at least three operands */
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/* assume all parallel instructions have at least three operands */
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const template tic54x_paroptab[] = {
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const insn_template tic54x_paroptab[] = {
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{ "ld",1,1,2,0xA800, 0xFE00, {OP_Xmem,OP_DST}, FL_PAR,0,0,
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{ "ld",1,1,2,0xA800, 0xFE00, {OP_Xmem,OP_DST}, FL_PAR,0,0,
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"mac", {OP_Ymem,OPT|OP_RND},},
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"mac", {OP_Ymem,OPT|OP_RND},},
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{ "ld",1,1,2,0xAA00, 0xFE00, {OP_Xmem,OP_DST}, FL_PAR,0,0,
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{ "ld",1,1,2,0xAA00, 0xFE00, {OP_Xmem,OP_DST}, FL_PAR,0,0,
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"macr", {OP_Ymem,OPT|OP_RND},},
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"macr", {OP_Ymem,OPT|OP_RND},},
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{ "ld",1,1,2,0xAC00, 0xFE00, {OP_Xmem,OP_DST}, FL_PAR,0,0,
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{ "ld",1,1,2,0xAC00, 0xFE00, {OP_Xmem,OP_DST}, FL_PAR,0,0,
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