| Line 566... |
Line 566... |
/* Set debug unit to handle TRAP exceptions */
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/* Set debug unit to handle TRAP exceptions */
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(void) or1ksim_read_spr (OR32_SPR_DSR, &dsr);
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(void) or1ksim_read_spr (OR32_SPR_DSR, &dsr);
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dsr |= OR32_SPR_DSR_TE;
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dsr |= OR32_SPR_DSR_TE;
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(void) or1ksim_write_spr (OR32_SPR_DSR, dsr);
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(void) or1ksim_write_spr (OR32_SPR_DSR, dsr);
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/* Set the single step trigger in Debug Mode Register 1 if we are stepping. */
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/* Set the single step trigger in Debug Mode Register 1 if we are
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stepping. Otherwise clear it! */
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if (step)
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if (step)
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{
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{
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(void) or1ksim_read_spr (OR32_SPR_DMR1, &dmr1);
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(void) or1ksim_read_spr (OR32_SPR_DMR1, &dmr1);
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dmr1 |= OR32_SPR_DMR1_ST;
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dmr1 |= OR32_SPR_DMR1_ST;
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(void) or1ksim_write_spr (OR32_SPR_DMR1, dmr1);
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(void) or1ksim_write_spr (OR32_SPR_DMR1, dmr1);
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}
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}
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else
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{
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(void) or1ksim_read_spr (OR32_SPR_DMR1, &dmr1);
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dmr1 &= ~OR32_SPR_DMR1_ST;
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(void) or1ksim_write_spr (OR32_SPR_DMR1, dmr1);
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}
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/* Set the NPC if it has changed */
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/* Set the NPC if it has changed */
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(void) or1ksim_read_reg (OR32_NPC_REGNUM, &npc);
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(void) or1ksim_read_reg (OR32_NPC_REGNUM, &npc);
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if (npc != sd->resume_npc)
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if (npc != sd->resume_npc)
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| Line 601... |
Line 608... |
break;
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break;
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case OR1KSIM_RC_BRKPT:
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case OR1KSIM_RC_BRKPT:
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sd->last_reason = sim_stopped;
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sd->last_reason = sim_stopped;
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sd->last_rc = TARGET_SIGNAL_TRAP;
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sd->last_rc = TARGET_SIGNAL_TRAP;
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/* This could have been a breakpoint or single step. */
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if (step)
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{
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(void) or1ksim_read_reg (OR32_NPC_REGNUM, &(sd->resume_npc));
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}
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else
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{
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(void) or1ksim_read_reg (OR32_PPC_REGNUM, &(sd->resume_npc));
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(void) or1ksim_read_reg (OR32_PPC_REGNUM, &(sd->resume_npc));
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}
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break;
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break;
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case OR1KSIM_RC_OK:
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case OR1KSIM_RC_OK:
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/* Should not happen */
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/* Should not happen */
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fprintf (stderr, "Ooops. Didn't expect OK return from Or1ksim.\n");
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fprintf (stderr, "Ooops. Didn't expect OK return from Or1ksim.\n");
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