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Line 31... |
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#include "server.h"
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#include "server.h"
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#include "regdef.h"
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#include "regdef.h"
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#include "linux-low.h"
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#include "linux-low.h"
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#include <asm/ptrace.h> /* For openrisc kernel ptrace register offsets */
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#ifdef HAVE_SYS_REG_H
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#ifdef HAVE_SYS_REG_H
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#include <sys/reg.h>
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#include <sys/reg.h>
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#endif
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#endif
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Line 48... |
/* -------------------------------------------------------------------------- */
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/* -------------------------------------------------------------------------- */
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static void
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static void
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init_registers_or32 ()
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init_registers_or32 ()
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{
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{
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struct reg regs_or32[] = {
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struct reg regs_or32[] = {
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{ "r0", 0, 32 },
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{ "npc", PC * 8, 32 },
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{ "sp", 32, 32 },
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{ "sr", SR * 8, 32 },
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{ "fp", 64, 32 },
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{ "sp", SP * 8, 32 },
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{ "r3", 96, 32 },
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{ "fp", GPR2 * 8, 32 },
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{ "r4", 128, 32 },
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{ "r3", GPR3 * 8, 32 },
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{ "r5", 160, 32 },
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{ "r4", GPR4 * 8, 32 },
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{ "r6", 192, 32 },
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{ "r5", GPR5 * 8, 32 },
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{ "r7", 224, 32 },
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{ "r6", GPR6 * 8, 32 },
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{ "r8", 256, 32 },
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{ "r7", GPR7 * 8, 32 },
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{ "lr", 288, 32 },
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{ "r8", GPR8 * 8, 32 },
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{ "r10", 320, 32 },
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{ "lr", GPR9 * 8, 32 },
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{ "r11", 352, 32 },
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{ "r10", GPR10 * 8, 32 },
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{ "r12", 384, 32 },
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{ "r11", GPR11 * 8, 32 },
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{ "r13", 416, 32 },
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{ "r12", GPR12 * 8, 32 },
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{ "r14", 448, 32 },
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{ "r13", GPR13 * 8, 32 },
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{ "r15", 480, 32 },
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{ "r14", GPR14 * 8, 32 },
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{ "r16", 512, 32 },
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{ "r15", GPR15 * 8, 32 },
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{ "r17", 544, 32 },
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{ "r16", GPR16 * 8, 32 },
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{ "r18", 576, 32 },
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{ "r17", GPR17 * 8, 32 },
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{ "r19", 608, 32 },
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{ "r18", GPR18 * 8, 32 },
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{ "r20", 640, 32 },
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{ "r19", GPR19 * 8, 32 },
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{ "r21", 672, 32 },
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{ "r20", GPR20 * 8, 32 },
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{ "r22", 704, 32 },
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{ "r21", GPR21 * 8, 32 },
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{ "r23", 736, 32 },
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{ "r22", GPR22 * 8, 32 },
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{ "r24", 768, 32 },
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{ "r23", GPR23 * 8, 32 },
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{ "r25", 800, 32 },
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{ "r24", GPR24 * 8, 32 },
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{ "r26", 832, 32 },
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{ "r25", GPR25 * 8, 32 },
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{ "r27", 864, 32 },
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{ "r26", GPR26 * 8, 32 },
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{ "r28", 896, 32 },
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{ "r27", GPR27 * 8, 32 },
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{ "r29", 928, 32 },
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{ "r28", GPR28 * 8, 32 },
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{ "r30", 960, 32 },
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{ "r29", GPR29 * 8, 32 },
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{ "r31", 992, 32 },
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{ "r30", GPR30 * 8, 32 },
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{ "ppc", 1024, 32 },
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{ "r31", GPR31 * 8, 32 },
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{ "npc", 1056, 32 },
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{ "sr", 1088, 32 },
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};
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};
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static const char *expedite_regs_or32[] = { "sp", "lr", "npc", 0 };
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static const char *expedite_regs_or32[] = { "sp", "lr", "npc", 0 };
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set_register_cache (regs_or32, sizeof (regs_or32) / sizeof (regs_or32[0]));
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set_register_cache (regs_or32, sizeof (regs_or32) / sizeof (regs_or32[0]));
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gdbserver_expedite_regs = expedite_regs_or32;
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gdbserver_expedite_regs = expedite_regs_or32;
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gdbserver_xmltarget = NULL;
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gdbserver_xmltarget = NULL;
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}
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}
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/*! OpenRISC has 32 general purpose registers followed by PPC, NPC and SR in
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/*! OpenRISC Linux ptrace provides NPC, SR, then GPRS 1 to 31 */
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that order. */
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#define or32_num_regs (2 + 31)
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#define or32_num_regs (32 + 3)
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/* -------------------------------------------------------------------------- */
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/* -------------------------------------------------------------------------- */
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/*!Provide the ptrace "address" of a register.
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/*!Provide the ptrace "address" of a register.
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*/
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Not properly supported by uClibc/Linux just yet. The register offsets are
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pure guesswork. */
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/* -------------------------------------------------------------------------- */
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/* -------------------------------------------------------------------------- */
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static int or32_regmap[] = {
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static int or32_regmap[] = {
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#ifdef PT_R0
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#ifdef PC
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PT_R0, PT_SP, PT_FP, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
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PC , SR , SP , GPR2 , GPR3 , GPR4 , GPR5 , GPR6 ,
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PT_R8, PT_LR, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
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GPR7 , GPR8 , GPR9 , GPR10, GPR11, GPR12, GPR13, GPR14,
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PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
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GPR15, GPR16, GPR17, GPR18, GPR19, GPR20, GPR21, GPR22,
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PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
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GPR23, GPR24, GPR25, GPR26, GPR27, GPR28, GPR29, GPR30,
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PT_PPC, PT_NPC, PT_SR
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GPR31
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#else
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#else
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4 * 0, 4 * 1, 4 * 2, 4 * 3, 4 * 4, 4 * 5, 4 * 6, 4 * 7,
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4 * 0, 4 * 1, 4 * 2, 4 * 3, 4 * 4, 4 * 5, 4 * 6, 4 * 7,
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4 * 8, 4 * 9, 4 * 10, 4 * 11, 4 * 12, 4 * 13, 4 * 14, 4 * 15,
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4 * 8, 4 * 9, 4 * 10, 4 * 11, 4 * 12, 4 * 13, 4 * 14, 4 * 15,
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4 * 16, 4 * 17, 4 * 18, 4 * 19, 4 * 20, 4 * 21, 4 * 22, 4 * 23,
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4 * 16, 4 * 17, 4 * 18, 4 * 19, 4 * 20, 4 * 21, 4 * 22, 4 * 23,
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4 * 24, 4 * 25, 4 * 26, 4 * 27, 4 * 28, 4 * 29, 4 * 30, 4 * 31,
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4 * 24, 4 * 25, 4 * 26, 4 * 27, 4 * 28, 4 * 29, 4 * 30, 4 * 31,
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| Line 192... |
Line 189... |
static void
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static void
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or32_set_pc (struct regcache *regcache,
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or32_set_pc (struct regcache *regcache,
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CORE_ADDR pc)
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CORE_ADDR pc)
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{
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{
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unsigned long int npc = pc;
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unsigned long int npc = pc;
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supply_register_by_name (regcache, "pc", &npc);
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supply_register_by_name (regcache, "npc", &npc);
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} /* or32_set_pc () */
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} /* or32_set_pc () */
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/*! The value of a breakpoint instruction (l.trap 1). */
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/*! The value of a breakpoint instruction (l.trap 1). */
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