| Line 112... |
Line 112... |
{
|
{
|
/*!A global record of the simulator description */
|
/*!A global record of the simulator description */
|
static SIM_DESC static_sd = NULL;
|
static SIM_DESC static_sd = NULL;
|
|
|
#ifdef OR32_SIM_DEBUG
|
#ifdef OR32_SIM_DEBUG
|
printf ("sim_open called\n");
|
printf ("sim_open called\n", (int) kind);
|
#endif
|
#endif
|
|
|
/* If static_sd is not yet allocated, we allocate it and mark the simulator
|
/* If static_sd is not yet allocated, we allocate it and mark the simulator
|
as not yet open. This is the only time we can process any custom
|
as not yet open. This is the only time we can process any custom
|
arguments and only time we initialize the simulator. */
|
arguments and only time we initialize the simulator. */
|
| Line 362... |
Line 362... |
int len)
|
int len)
|
{
|
{
|
int res = or1ksim_read_mem (mem, buf, len);
|
int res = or1ksim_read_mem (mem, buf, len);
|
|
|
#ifdef OR32_SIM_DEBUG
|
#ifdef OR32_SIM_DEBUG
|
printf ("Reading %d bytes from 0x%08p\n", len, mem);
|
printf ("Reading %d bytes from 0x%8p\n", len, (void *) mem);
|
#endif
|
#endif
|
|
|
return res;
|
return res;
|
|
|
} /* sim_read () */
|
} /* sim_read () */
|
| Line 388... |
Line 388... |
SIM_ADDR mem,
|
SIM_ADDR mem,
|
const unsigned char *buf,
|
const unsigned char *buf,
|
int len)
|
int len)
|
{
|
{
|
#ifdef OR32_SIM_DEBUG
|
#ifdef OR32_SIM_DEBUG
|
printf ("Writing %d bytes to 0x%08p\n", len, mem);
|
printf ("Writing %d bytes to 0x%8p\n", len, (void *) mem);
|
#endif
|
#endif
|
|
|
return or1ksim_write_mem ((unsigned int) mem, buf, len);
|
return or1ksim_write_mem ((unsigned int) mem, buf, len);
|
|
|
} /* sim_write () */
|
} /* sim_write () */
|
| Line 431... |
Line 431... |
#ifdef OR32_SIM_DEBUG
|
#ifdef OR32_SIM_DEBUG
|
printf ("sim_fetch_register (regno=%d\n) called\n", regno);
|
printf ("sim_fetch_register (regno=%d\n) called\n", regno);
|
#endif
|
#endif
|
if (4 != len)
|
if (4 != len)
|
{
|
{
|
fprintf (stderr, "Invalid register length %d\n");
|
fprintf (stderr, "Invalid register length %d\n", len);
|
return 0;
|
return 0;
|
}
|
}
|
|
|
if (OR32_NPC_REGNUM == regno)
|
if (OR32_NPC_REGNUM == regno)
|
{
|
{
|
| Line 497... |
Line 497... |
printf ("sim_store_register (regno=%d\n) called\n", regno);
|
printf ("sim_store_register (regno=%d\n) called\n", regno);
|
#endif
|
#endif
|
|
|
if (4 != len)
|
if (4 != len)
|
{
|
{
|
fprintf (stderr, "Invalid register length %d\n");
|
fprintf (stderr, "Invalid register length %d\n", len);
|
return 0;
|
return 0;
|
}
|
}
|
|
|
/* Convert from target (big) endian */
|
/* Convert from target (big) endian */
|
regval = (((unsigned int) buf[0]) << 24) |
|
regval = (((unsigned int) buf[0]) << 24) |
|
| Line 586... |
Line 586... |
unsigned long int dmr1; /* Debug Mode Register 1*/
|
unsigned long int dmr1; /* Debug Mode Register 1*/
|
unsigned long int dmr2; /* Debug Mode Register 2*/
|
unsigned long int dmr2; /* Debug Mode Register 2*/
|
|
|
unsigned long int retval; /* Return value on Or1ksim exit */
|
unsigned long int retval; /* Return value on Or1ksim exit */
|
|
|
|
unsigned long int cycles; /* Length of run in cycles */
|
int res; /* Result of a run. */
|
int res; /* Result of a run. */
|
|
|
#ifdef OR32_SIM_DEBUG
|
#ifdef OR32_SIM_DEBUG
|
printf ("sim_resume called\n");
|
printf ("sim_resume called\n");
|
#endif
|
#endif
|
| Line 632... |
Line 633... |
if (npc != sd->resume_npc)
|
if (npc != sd->resume_npc)
|
{
|
{
|
(void) or1ksim_write_reg (OR32_NPC_REGNUM, sd->resume_npc);
|
(void) or1ksim_write_reg (OR32_NPC_REGNUM, sd->resume_npc);
|
}
|
}
|
|
|
|
/* Set a time point */
|
|
or1ksim_set_time_point ();
|
|
|
/* Unstall and run */
|
/* Unstall and run */
|
or1ksim_set_stall_state (0);
|
or1ksim_set_stall_state (0);
|
res = or1ksim_run (-1.0);
|
res = or1ksim_run (-1.0);
|
|
|
/* Determine the reason for stopping. If we hit a breakpoint, then the
|
/* Determine the reason for stopping. If we hit a breakpoint, then the
|
| Line 646... |
Line 650... |
case OR1KSIM_RC_HALTED:
|
case OR1KSIM_RC_HALTED:
|
sd->last_reason = sim_exited;
|
sd->last_reason = sim_exited;
|
(void) or1ksim_read_reg (OR32_FIRST_ARG_REGNUM, &retval);
|
(void) or1ksim_read_reg (OR32_FIRST_ARG_REGNUM, &retval);
|
sd->last_rc = (unsigned int) retval;
|
sd->last_rc = (unsigned int) retval;
|
sd->resume_npc = OR32_RESET_EXCEPTION;
|
sd->resume_npc = OR32_RESET_EXCEPTION;
|
|
cycles = (long int) (or1ksim_get_time_period ()
|
|
* (double) or1ksim_clock_rate());
|
|
printf ("%ld cycles: Exiting (%u)\n", cycles, sd->last_rc);
|
break;
|
break;
|
|
|
case OR1KSIM_RC_BRKPT:
|
case OR1KSIM_RC_BRKPT:
|
sd->last_reason = sim_stopped;
|
sd->last_reason = sim_stopped;
|
sd->last_rc = TARGET_SIGNAL_TRAP;
|
sd->last_rc = TARGET_SIGNAL_TRAP;
|
| Line 755... |
Line 762... |
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
void
|
void
|
sim_do_command (SIM_DESC sd ATTRIBUTE_UNUSED,
|
sim_do_command (SIM_DESC sd ATTRIBUTE_UNUSED,
|
char *cmd ATTRIBUTE_UNUSED)
|
char *cmd ATTRIBUTE_UNUSED)
|
{
|
{
|
|
#ifdef OR32_SIM_DEBUG
|
|
printf ("sim_do_command called\n");
|
|
#endif
|
|
|
} /* sim_do_command () */
|
} /* sim_do_command () */
|
|
|
|
|
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
/* Set the default host_callback_struct
|
/* Set the default host_callback_struct
|
| Line 770... |
Line 781... |
@param[in] ptr The host_callback_struct pointer. Unused here. */
|
@param[in] ptr The host_callback_struct pointer. Unused here. */
|
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
void
|
void
|
sim_set_callbacks (struct host_callback_struct *ptr ATTRIBUTE_UNUSED)
|
sim_set_callbacks (struct host_callback_struct *ptr ATTRIBUTE_UNUSED)
|
{
|
{
|
|
#ifdef OR32_SIM_DEBUG
|
|
printf ("sim_set_callbacks called\n");
|
|
#endif
|
|
|
} /* sim_set_callbacks () */
|
} /* sim_set_callbacks () */
|
|
|
|
|
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
/* Set the size of the simulator memory array.
|
/* Set the size of the simulator memory array.
|
| Line 785... |
Line 800... |
@param[in] size The memory size to use. Unused here. */
|
@param[in] size The memory size to use. Unused here. */
|
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
void
|
void
|
sim_size (int size ATTRIBUTE_UNUSED)
|
sim_size (int size ATTRIBUTE_UNUSED)
|
{
|
{
|
|
#ifdef OR32_SIM_DEBUG
|
|
printf ("sim_size called\n");
|
|
#endif
|
|
|
} /* sim_size () */
|
} /* sim_size () */
|
|
|
|
|
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
/* Single step the simulator with tracing enabled.
|
/* Single step the simulator with tracing enabled.
|
| Line 800... |
Line 819... |
@param[in] sd The simulator description struct. Unused here. */
|
@param[in] sd The simulator description struct. Unused here. */
|
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
void
|
void
|
sim_trace (SIM_DESC sd ATTRIBUTE_UNUSED)
|
sim_trace (SIM_DESC sd ATTRIBUTE_UNUSED)
|
{
|
{
|
|
#ifdef OR32_SIM_DEBUG
|
|
printf ("sim_trace called\n");
|
|
#endif
|
|
|
} /* sim_trace () */
|
} /* sim_trace () */
|
|
|
No newline at end of file
|
No newline at end of file
|
