URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.2/] [sim/] [or32/] [wrapper.c] - Diff between revs 399 and 531

Rev 399	Rev 531
Line 652...	Line 652...
`(void) or1ksim_read_reg (OR32_FIRST_ARG_REGNUM, &retval);`	`(void) or1ksim_read_reg (OR32_FIRST_ARG_REGNUM, &retval);`
`sd->last_rc = (unsigned int) retval;`	`sd->last_rc = (unsigned int) retval;`
`sd->resume_npc = OR32_RESET_EXCEPTION;`	`sd->resume_npc = OR32_RESET_EXCEPTION;`
`cycles = (long int) (or1ksim_get_time_period ()`	`cycles = (long int) (or1ksim_get_time_period ()`
`* (double) or1ksim_clock_rate());`	`* (double) or1ksim_clock_rate());`
`printf ("%ld cycles: Exiting (%u)\n", cycles, sd->last_rc);`
`break;`	`break;`

`case OR1KSIM_RC_BRKPT:`	`case OR1KSIM_RC_BRKPT:`
`sd->last_reason = sim_stopped;`	`sd->last_reason = sim_stopped;`
`sd->last_rc = TARGET_SIGNAL_TRAP;`	`sd->last_rc = TARGET_SIGNAL_TRAP;`