| Line 54... |
Line 54... |
l.sw 0(r1),r3 ;\
|
l.sw 0(r1),r3 ;\
|
l.movhi r4,hi(str) /* Name of exception */ ;\
|
l.movhi r4,hi(str) /* Name of exception */ ;\
|
l.ori r4,r4,lo(str) ;\
|
l.ori r4,r4,lo(str) ;\
|
l.sw 4(r1),r4 ;\
|
l.sw 4(r1),r4 ;\
|
l.mfspr r5,r0,SPR_EPCR_BASE /* Source of the interrupt */ ;\
|
l.mfspr r5,r0,SPR_EPCR_BASE /* Source of the interrupt */ ;\
|
l.jal _printf ;\
|
l.jal printf ;\
|
l.sw 8(r1),r5 ;\
|
l.sw 8(r1),r5 ;\
|
;\
|
;\
|
l.ori r3,r0,0xffff /* Failure RC */ ;\
|
l.ori r3,r0,0xffff /* Failure RC */ ;\
|
l.jal _exit ;\
|
l.jal _exit ;\
|
l.nop ;\
|
l.nop ;\
|
| Line 115... |
Line 115... |
l.j _start
|
l.j _start
|
l.nop
|
l.nop
|
|
|
/* 0x200: BUS exception is special, because during startup we use it
|
/* 0x200: BUS exception is special, because during startup we use it
|
to detect where the stack should go. So we need some special code
|
to detect where the stack should go. So we need some special code
|
before we return, which wel will later overwrite with l.nop.
|
before we return, which wel will later overwrite with l.nop. We
|
|
need to deal with the case when _start is called multiple times, so
|
|
this code must be copied into the bus error vector each time. It is
|
|
position independent to allow this copying.
|
|
|
We use registers we know will not interfere in this case. */
|
We use registers we know will not interfere in this case. */
|
.org 0x200
|
.org 0x200
|
_buserr:
|
_buserr:
|
|
l.nop /* Will be overwritten */
|
|
l.nop
|
|
l.nop
|
|
l.nop
|
|
|
|
_buserr_std:
|
|
UNHANDLED_EXCEPTION (.L200)
|
|
|
|
_buserr_special:
|
l.mfspr r24,r0,SPR_EPCR_BASE
|
l.mfspr r24,r0,SPR_EPCR_BASE
|
l.addi r24,r24,4 /* Return one instruction on */
|
l.addi r24,r24,4 /* Return one instruction on */
|
l.mtspr r0,r24,SPR_EPCR_BASE
|
l.mtspr r0,r24,SPR_EPCR_BASE
|
l.rfe
|
l.rfe
|
|
|
_buserr_std:
|
|
UNHANDLED_EXCEPTION (.L200)
|
|
|
|
/* 0x300: Data Page Fault exception */
|
/* 0x300: Data Page Fault exception */
|
.org 0x300
|
.org 0x300
|
UNHANDLED_EXCEPTION (.L300)
|
UNHANDLED_EXCEPTION (.L300)
|
|
|
/* 0x400: Insn Page Fault exception */
|
/* 0x400: Insn Page Fault exception */
|
| Line 251... |
Line 260... |
- call exit if the main function ever returns.
|
- call exit if the main function ever returns.
|
- loop forever (should never get here) */
|
- loop forever (should never get here) */
|
/* -------------------------------------------------------------------------- */
|
/* -------------------------------------------------------------------------- */
|
/* The stack grows down from the top of writable memory. */
|
/* The stack grows down from the top of writable memory. */
|
.section .data
|
.section .data
|
.global _stack
|
.global stack
|
_stack: .space 4,0
|
stack: .space 4,0
|
|
|
.section .text
|
.section .text
|
.global _start
|
.global _start
|
.type _start,@function
|
.type _start,@function
|
|
|
_start:
|
_start:
|
|
/* Finding the end of stack means we need to handle the bus
|
|
error. Patch in some special handler code. */
|
|
l.movhi r30,hi(_buserr) /* Where to copy to */
|
|
l.ori r30,r30,lo(_buserr)
|
|
l.movhi r28,hi(_buserr_std) /* Where to stop copying */
|
|
l.ori r28,r28,lo(_buserr_std)
|
|
l.movhi r26,hi(_buserr_special) /* Where to copy from */
|
|
l.ori r26,r26,lo(_buserr_special)
|
|
|
|
.L11: l.sfeq r28,r30
|
|
l.bf .L12
|
|
l.nop
|
|
|
|
l.lwz r24,0(r26) /* Get the instruction */
|
|
l.sw 0(r30),r24 /* Patch the instruction */
|
|
l.addi r26,r26,4 /* Next source instruction */
|
|
l.j .L11
|
|
l.addi r30,r30,4 /* Delay slot: next dest location */
|
|
|
/* Determine where the stack should end. Must be somewhere above the
|
/* Determine where the stack should end. Must be somewhere above the
|
end of loaded memory. We look in blocks of 64KB. */
|
end of loaded memory. We look in blocks of 64KB. */
|
l.movhi r30,hi(end)
|
.L12: l.movhi r30,hi(end)
|
l.ori r30,r30,lo(end)
|
l.ori r30,r30,lo(end)
|
l.srli r30,r30,16 /* Round down to 64KB boundary */
|
l.srli r30,r30,16 /* Round down to 64KB boundary */
|
l.slli r30,r30,16
|
l.slli r30,r30,16
|
|
|
l.addi r28,r0,1 /* Constant 64KB in register */
|
l.addi r28,r0,1 /* Constant 64KB in register */
|
| Line 276... |
Line 304... |
|
|
l.movhi r26,0xaaaa /* Test pattern to store in memory */
|
l.movhi r26,0xaaaa /* Test pattern to store in memory */
|
l.ori r26,r26,0xaaaa
|
l.ori r26,r26,0xaaaa
|
|
|
/* Is this a writeable location? */
|
/* Is this a writeable location? */
|
.L3:
|
.L3: l.sw 0(r30),r26
|
l.sw 0(r30),r26
|
|
l.lwz r24,0(r30)
|
l.lwz r24,0(r30)
|
l.sfeq r24,r26
|
l.sfeq r24,r26
|
l.bnf .L4
|
l.bnf .L4
|
l.nop
|
l.nop
|
|
|
l.j .L3
|
l.j .L3
|
l.add r30,r30,r28 /* Try 64KB higher */
|
l.add r30,r30,r28 /* Try 64KB higher */
|
|
|
.L4:
|
.L4: l.sub r30,r30,r28 /* Previous value was wanted */
|
l.sub r30,r30,r28 /* Previous value was wanted */
|
l.movhi r26,hi(stack)
|
l.movhi r26,hi(_stack)
|
l.ori r26,r26,lo(stack)
|
l.ori r26,r26,lo(_stack)
|
|
l.sw 0(r26),r30
|
l.sw 0(r26),r30
|
|
|
/* Initialise stack and frame pointer (set to same value) */
|
/* Initialise stack and frame pointer (set to same value) */
|
l.add r1,r30,r0
|
l.add r1,r30,r0
|
l.add r2,r30,r0
|
l.add r2,r30,r0
|
| Line 304... |
Line 330... |
l.movhi r28,hi(_buserr_std)
|
l.movhi r28,hi(_buserr_std)
|
l.ori r28,r28,lo(_buserr_std)
|
l.ori r28,r28,lo(_buserr_std)
|
l.movhi r26,0x1500 /* l.nop 0 */
|
l.movhi r26,0x1500 /* l.nop 0 */
|
l.ori r26,r26,0x0000
|
l.ori r26,r26,0x0000
|
|
|
.L5:
|
.L5: l.sfeq r28,r30
|
l.sfeq r28,r30
|
|
l.bf .L6
|
l.bf .L6
|
l.nop
|
l.nop
|
|
|
l.sw 0(r30),r26 /* Patch the instruction */
|
l.sw 0(r30),r26 /* Patch the instruction */
|
l.j .L5
|
l.j .L5
|
l.addi r30,r30,4 /* Delay slot: next instruction */
|
l.addi r30,r30,4 /* Delay slot: next instruction */
|
|
|
.L6:
|
|
/* Instruction cache enable */
|
/* Instruction cache enable */
|
/* Check if IC present and skip enabling otherwise */
|
/* Check if IC present and skip enabling otherwise */
|
l.mfspr r24,r0,SPR_UPR
|
.L6: l.mfspr r24,r0,SPR_UPR
|
l.andi r26,r24,SPR_UPR_ICP
|
l.andi r26,r24,SPR_UPR_ICP
|
l.sfeq r26,r0
|
l.sfeq r26,r0
|
l.bf .L8
|
l.bf .L8
|
l.nop
|
l.nop
|
|
|
| Line 353... |
Line 377... |
|
|
/* Invalidate IC */
|
/* Invalidate IC */
|
l.addi r6,r0,0
|
l.addi r6,r0,0
|
l.sll r5,r14,r28
|
l.sll r5,r14,r28
|
|
|
.L7:
|
.L7: l.mtspr r0,r6,SPR_ICBIR
|
l.mtspr r0,r6,SPR_ICBIR
|
|
l.sfne r6,r5
|
l.sfne r6,r5
|
l.bf .L7
|
l.bf .L7
|
l.add r6,r6,r14
|
l.add r6,r6,r14
|
|
|
/* Enable IC */
|
/* Enable IC */
|
| Line 372... |
Line 395... |
l.nop
|
l.nop
|
l.nop
|
l.nop
|
l.nop
|
l.nop
|
l.nop
|
l.nop
|
|
|
.L8:
|
|
/* Data cache enable */
|
/* Data cache enable */
|
/* Check if DC present and skip enabling otherwise */
|
/* Check if DC present and skip enabling otherwise */
|
l.mfspr r24,r0,SPR_UPR
|
.L8: l.mfspr r24,r0,SPR_UPR
|
l.andi r26,r24,SPR_UPR_DCP
|
l.andi r26,r24,SPR_UPR_DCP
|
l.sfeq r26,r0
|
l.sfeq r26,r0
|
l.bf .L10
|
l.bf .L10
|
l.nop
|
l.nop
|
/* Disable DC */
|
/* Disable DC */
|
| Line 407... |
Line 429... |
l.ori r30,r0,1
|
l.ori r30,r0,1
|
l.sll r16,r30,r28
|
l.sll r16,r30,r28
|
/* Invalidate DC */
|
/* Invalidate DC */
|
l.addi r6,r0,0
|
l.addi r6,r0,0
|
l.sll r5,r14,r28
|
l.sll r5,r14,r28
|
.L9:
|
|
l.mtspr r0,r6,SPR_DCBIR
|
.L9: l.mtspr r0,r6,SPR_DCBIR
|
l.sfne r6,r5
|
l.sfne r6,r5
|
l.bf .L9
|
l.bf .L9
|
l.add r6,r6,r14
|
l.add r6,r6,r14
|
/* Enable DC */
|
/* Enable DC */
|
l.mfspr r6,r0,SPR_SR
|
l.mfspr r6,r0,SPR_SR
|
l.ori r6,r6,SPR_SR_DCE
|
l.ori r6,r6,SPR_SR_DCE
|
l.mtspr r0,r6,SPR_SR
|
l.mtspr r0,r6,SPR_SR
|
|
|
.L10:
|
|
/* Clear BSS */
|
/* Clear BSS */
|
l.movhi r28,hi(__bss_start)
|
.L10: l.movhi r28,hi(__bss_start)
|
l.ori r28,r28,lo(__bss_start)
|
l.ori r28,r28,lo(__bss_start)
|
l.movhi r30,hi(end)
|
l.movhi r30,hi(end)
|
l.ori r30,r30,lo(end)
|
l.ori r30,r30,lo(end)
|
|
|
.L1:
|
.L1: l.sw (0)(r28),r0
|
l.sw (0)(r28),r0
|
|
l.sfltu r28,r30
|
l.sfltu r28,r30
|
l.bf .L1
|
l.bf .L1
|
l.addi r28,r28,4 /* Delay slot */
|
l.addi r28,r28,4 /* Delay slot */
|
|
|
/* Call global and static constructors */
|
/* Call global and static constructors */
|
l.jal init
|
l.jal init
|
l.nop
|
l.nop
|
|
|
/* Set up destructors to be called from exit if main never returns */
|
/* Set up destructors to be called from exit if main never returns */
|
l.movhi r3,hi(fini)
|
l.movhi r3,hi(fini)
|
l.jal _atexit
|
l.jal atexit
|
l.ori r3,r3,lo(fini) /* Delay slot */
|
l.ori r3,r3,lo(fini) /* Delay slot */
|
|
|
/* Initialise UART in a C function. If the UART isn't present, we'll */
|
/* Initialise UART in a C function. If the UART isn't present, we'll */
|
/* link against a dummy function. */
|
/* link against a dummy function. */
|
l.jal __uart_init
|
l.jal _uart_init
|
l.nop
|
l.nop
|
|
|
/* Jump to main program entry point (argc = argv = envp = 0) */
|
/* Jump to main program entry point (argc = argv = envp = 0) */
|
l.or r3,r0,r0
|
l.or r3,r0,r0
|
l.or r4,r0,r0
|
l.or r4,r0,r0
|
l.jal _main
|
l.jal main
|
l.or r5,r0,r0 /* Delay slot */
|
l.or r5,r0,r0 /* Delay slot */
|
|
|
/* If program exits, call exit routine */
|
/* If program exits, call exit routine */
|
l.jal _exit
|
l.jal _exit
|
l.addi r3,r11,0 /* Delay slot */
|
l.addi r3,r11,0 /* Delay slot */
|
|
|
/* Loop forever */
|
/* Loop forever */
|
.L2:
|
.L2: l.j .L2
|
l.j .L2
|
|
l.nop
|
l.nop
|
|
|
.size _start, .-_start
|
.size _start, .-_start
|
