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https://opencores.org/ocsvn/openrisc/openrisc/trunk
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Rev 490 |
Rev 518 |
Line 920... |
Line 920... |
abort ();
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abort ();
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}
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}
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else
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else
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abort ();
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abort ();
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}
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}
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else if (GET_CODE (operands[1]) == CONST_INT)
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{
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if (INTVAL (operands[1]) < 0)
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output_asm_insn ("\tl.addi \t%0, r0, -1", operands);
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else
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output_asm_insn ("\tl.or \t%0, r0, r0", operands);
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output_asm_insn ("\tl.movhi \t%H0, hi(%1)", operands);
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output_asm_insn ("\tl.ori \t%H0, %H0, lo(%1)", operands);
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return "";
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}
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else
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else
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abort ();
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abort ();
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case MEM:
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case MEM:
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xoperands[0] = XEXP (operands[0], 0);
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xoperands[0] = XEXP (operands[0], 0);
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if (GET_CODE (xoperands[0]) == REG)
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if (GET_CODE (xoperands[0]) == REG)
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