URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 455 |
Rev 512 |
Line 154... |
Line 154... |
srv_xmlfiles="${srv_xmlfiles} mips64-fpu.xml"
|
srv_xmlfiles="${srv_xmlfiles} mips64-fpu.xml"
|
srv_linux_regsets=yes
|
srv_linux_regsets=yes
|
srv_linux_usrregs=yes
|
srv_linux_usrregs=yes
|
srv_linux_thread_db=yes
|
srv_linux_thread_db=yes
|
;;
|
;;
|
or32*-*-linux*) # srv_regobj=reg-or32.o
|
or32*-*-linux*) srv_regobj=reg-or32.o
|
srv_tgtobj="linux-low.o linux-or32-low.o"
|
srv_tgtobj="linux-low.o linux-or32-low.o"
|
srv_linux_usrregs=yes
|
srv_linux_usrregs=yes
|
srv_linux_thread_db=yes
|
srv_linux_thread_db=yes
|
;;
|
;;
|
powerpc*-*-linux*) srv_regobj="powerpc-32l.o"
|
powerpc*-*-linux*) srv_regobj="powerpc-32l.o"
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.