OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_alu.v] - Diff between revs 185 and 258

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 185 Rev 258
Line 190... Line 190... 
                                else begin
 
                                else begin
 
                                        result = b << 16;
 
                                        result = b << 16;
 
                                end
 
                                end
 
                end
 
                end
 
`ifdef OR1200_MULT_IMPLEMENTED
 
`ifdef OR1200_MULT_IMPLEMENTED
 
`ifdef OR1200_IMPL_DIV
 
`ifdef OR1200_DIV_IMPLEMENTED
 
                `OR1200_ALUOP_DIV,
 
                `OR1200_ALUOP_DIV,
 
                `OR1200_ALUOP_DIVU,
 
                `OR1200_ALUOP_DIVU,
 
`endif
 
`endif
 
                `OR1200_ALUOP_MUL : begin
 
                `OR1200_ALUOP_MUL : begin
 
                                result = mult_mac_result;
 
                                result = mult_mac_result;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.