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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// OR1200's ALU ////
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//// OR1200's ALU ////
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//// ////
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//// ////
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//// This file is part of the OpenRISC 1200 project ////
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//// This file is part of the OpenRISC 1200 project ////
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//// http://www.opencores.org/cores/or1k/ ////
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//// http://www.opencores.org/project,or1k ////
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//// ////
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//// ////
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//// Description ////
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//// Description ////
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//// ALU ////
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//// ALU ////
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//// ////
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//// ////
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//// To Do: ////
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//// To Do: ////
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//// Public License along with this source; if not, download it ////
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//// Public License along with this source; if not, download it ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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//
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// $Log: or1200_alu.v,v $
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// $Log: or1200_alu.v,v $
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// Revision 2.0 2010/06/30 11:00:00 ORSoC
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// Revision 2.0 2010/06/30 11:00:00 ORSoC
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// Minor update:
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// Minor update:
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// Defines added, flags are corrected.
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// Defines added, flags are corrected.
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//
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// Revision 1.15 2005/01/07 09:23:39 andreje
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// l.ff1 and l.cmov instructions added
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//
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// Revision 1.14 2004/06/08 18:17:36 lampret
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// Non-functional changes. Coding style fixes.
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//
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// Revision 1.13 2004/05/09 19:49:03 lampret
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// Added some l.cust5 custom instructions as example
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//
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// Revision 1.12 2004/04/05 08:29:57 lampret
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// Merged branch_qmem into main tree.
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//
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// Revision 1.11 2003/04/24 00:16:07 lampret
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// No functional changes. Added defines to disable implementation of multiplier/MAC
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//
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// Revision 1.10 2002/09/08 05:52:16 lampret
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// Added optional l.div/l.divu insns. By default they are disabled.
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//
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// Revision 1.9 2002/09/07 19:16:10 lampret
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// If SR[CY] implemented with OR1200_IMPL_ADDC enabled, l.add/l.addi also set SR[CY].
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//
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// Revision 1.8 2002/09/07 05:42:02 lampret
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// Added optional SR[CY]. Added define to enable additional (compare) flag modifiers. Defines are OR1200_IMPL_ADDC and OR1200_ADDITIONAL_FLAG_MODIFIERS.
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//
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// Revision 1.7 2002/09/03 22:28:21 lampret
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// As per Taylor Su suggestion all case blocks are full case by default and optionally (OR1200_CASE_DEFAULT) can be disabled to increase clock frequncy.
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//
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// Revision 1.6 2002/03/29 16:40:10 lampret
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// Added a directive to ignore signed division variables that are only used in simulation.
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//
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// Revision 1.5 2002/03/29 16:33:59 lampret
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// Added again just recently removed full_case directive
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//
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// Revision 1.4 2002/03/29 15:16:53 lampret
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// Some of the warnings fixed.
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//
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// Revision 1.3 2002/01/28 01:15:59 lampret
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// Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways.
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//
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// Revision 1.2 2002/01/14 06:18:22 lampret
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// Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if.
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//
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// Revision 1.1 2002/01/03 08:16:15 lampret
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// New prefixes for RTL files, prefixed module names. Updated cache controllers and MMUs.
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//
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// Revision 1.10 2001/11/12 01:45:40 lampret
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// Moved flag bit into SR. Changed RF enable from constant enable to dynamic enable for read ports.
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//
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// Revision 1.9 2001/10/21 17:57:16 lampret
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// Removed params from generic_XX.v. Added translate_off/on in sprs.v and id.v. Removed spr_addr from dc.v and ic.v. Fixed CR+LF.
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//
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// Revision 1.8 2001/10/19 23:28:45 lampret
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// Fixed some synthesis warnings. Configured with caches and MMUs.
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//
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// Revision 1.7 2001/10/14 13:12:09 lampret
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// MP3 version.
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//
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// Revision 1.1.1.1 2001/10/06 10:18:35 igorm
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// no message
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//
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// Revision 1.2 2001/08/09 13:39:33 lampret
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// Major clean-up.
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//
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// Revision 1.1 2001/07/20 00:46:03 lampret
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// Development version of RTL. Libraries are missing.
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//
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//
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// synopsys translate_off
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// synopsys translate_off
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`include "timescale.v"
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`include "timescale.v"
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// synopsys translate_on
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// synopsys translate_on
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`include "or1200_defines.v"
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`include "or1200_defines.v"
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