URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_cpu.v] - Diff between revs 185 and 186

Rev 185	Rev 186
Line 579...	Line 579...
`.flag(flag),`	`.flag(flag),`
`.carry(carry)`	`.carry(carry)`
`);`	`);`


`ifdef OR1200_FPU_IMPLEMENTED

`//`	`//`
`// FPU's exception is being dealt with`	`// FPU's exception is being dealt with`
`//`	`//`
assign fpu_except_started = except_started && (except_type == `OR1200_EXCEPT_FLOAT);	assign fpu_except_started = except_started && (except_type == `OR1200_EXCEPT_FLOAT);

Line 609...	Line 607...
`.spr_write(spr_we),`	`.spr_write(spr_we),`
`.spr_addr(spr_addr),`	`.spr_addr(spr_addr),`
`.spr_dat_i(spr_dat_cpu),`	`.spr_dat_i(spr_dat_cpu),`
`.spr_dat_o(spr_dat_fpu)`	`.spr_dat_o(spr_dat_fpu)`
`);`	`);`
`else
`assign sig_fp = 0;`
`assign fpcsr = 0;`
`endif


`//`	`//`
`// Instantiation of CPU's multiply unit`	`// Instantiation of CPU's multiply unit`
`//`	`//`