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[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_ctrl.v] - Diff between revs 644 and 845

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Rev 644	Rev 845
Line 273...	Line 273...
`// l.addic`	`// l.addic`
`OR1200_OR32_ADDIC:	`OR1200_OR32_ADDIC:
`id_simm = {{16{id_insn[15]}}, id_insn[15:0]};`	`id_simm = {{16{id_insn[15]}}, id_insn[15:0]};`

`// l.lxx (load instructions)`	`// l.lxx (load instructions)`
`OR1200_OR32_LWZ, `OR1200_OR32_LBZ, `OR1200_OR32_LBS,	`OR1200_OR32_LWZ, `OR1200_OR32_LWS,
	`OR1200_OR32_LBZ, `OR1200_OR32_LBS,
`OR1200_OR32_LHZ, `OR1200_OR32_LHS:	`OR1200_OR32_LHZ, `OR1200_OR32_LHS:
`id_simm = {{16{id_insn[15]}}, id_insn[15:0]};`	`id_simm = {{16{id_insn[15]}}, id_insn[15:0]};`

`// l.muli`	`// l.muli`
`ifdef OR1200_MULT_IMPLEMENTED	`ifdef OR1200_MULT_IMPLEMENTED
Line 682...	Line 683...
`OR1200_OR32_XSYNC,	`OR1200_OR32_XSYNC,
`ifdef OR1200_MAC_IMPLEMENTED	`ifdef OR1200_MAC_IMPLEMENTED
`OR1200_OR32_MACI,	`OR1200_OR32_MACI,
`endif	`endif
`OR1200_OR32_LWZ,	`OR1200_OR32_LWZ,
	`OR1200_OR32_LWS,
`OR1200_OR32_LBZ,	`OR1200_OR32_LBZ,
`OR1200_OR32_LBS,	`OR1200_OR32_LBS,
`OR1200_OR32_LHZ,	`OR1200_OR32_LHZ,
`OR1200_OR32_LHS,	`OR1200_OR32_LHS,
`OR1200_OR32_ADDI,	`OR1200_OR32_ADDI,
Line 957...	Line 959...

`// l.lwz`	`// l.lwz`
`OR1200_OR32_LWZ:	`OR1200_OR32_LWZ:
rfwb_op <= {`OR1200_RFWBOP_LSU, 1'b1};	rfwb_op <= {`OR1200_RFWBOP_LSU, 1'b1};

	`// l.lws`
	`OR1200_OR32_LWS:
	rfwb_op <= {`OR1200_RFWBOP_LSU, 1'b1};

`// l.lbz`	`// l.lbz`
`OR1200_OR32_LBZ:	`OR1200_OR32_LBZ:
rfwb_op <= {`OR1200_RFWBOP_LSU, 1'b1};	rfwb_op <= {`OR1200_RFWBOP_LSU, 1'b1};

`// l.lbs`	`// l.lbs`
Line 1094...	Line 1100...

`// l.lwz`	`// l.lwz`
`OR1200_OR32_LWZ:	`OR1200_OR32_LWZ:
id_lsu_op = `OR1200_LSUOP_LWZ;	id_lsu_op = `OR1200_LSUOP_LWZ;

	`// l.lws`
	`OR1200_OR32_LWS:
	id_lsu_op = `OR1200_LSUOP_LWS;

`// l.lbz`	`// l.lbz`
`OR1200_OR32_LBZ:	`OR1200_OR32_LBZ:
id_lsu_op = `OR1200_LSUOP_LBZ;	id_lsu_op = `OR1200_LSUOP_LBZ;

`// l.lbs`	`// l.lbs`

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[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_ctrl.v] - Diff between revs 644 and 845