URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_dc_top.v] - Diff between revs 258 and 352

Rev 258	Rev 352
Line 290...	Line 290...
`// Tag comparison`	`// Tag comparison`
`//`	`//`
wire [31:`OR1200_DCTAGL] dcqmem_adr_i_tag;	wire [31:`OR1200_DCTAGL] dcqmem_adr_i_tag;
assign dcqmem_adr_i_tag = dcqmem_adr_i[31:`OR1200_DCTAGL];	assign dcqmem_adr_i_tag = dcqmem_adr_i[31:`OR1200_DCTAGL];

`always @(tag or dcqmem_adr_i or tag_v) begin`	`always @(tag or dcqmem_adr_i_tag or tag_v) begin`
`if ((tag != dcqmem_adr_i_tag) \|\| !tag_v)`	`if ((tag != dcqmem_adr_i_tag) \|\| !tag_v)`
`tagcomp_miss = 1'b1;`	`tagcomp_miss = 1'b1;`
`else`	`else`
`tagcomp_miss = 1'b0;`	`tagcomp_miss = 1'b0;`
`end`	`end`