OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_dmmu_top.v] - Diff between revs 358 and 364

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 358 Rev 364
Line 231... Line 231...
// Register dcpu_adr_i's VPN for use when DMMU is not enabled but PPN is 
// Register dcpu_adr_i's VPN for use when DMMU is not enabled but PPN is 
// expected to come one clock cycle after offset part.
// expected to come one clock cycle after offset part.
//
//
always @(posedge clk or `OR1200_RST_EVENT rst)
always @(posedge clk or `OR1200_RST_EVENT rst)
        if (rst == `OR1200_RST_VALUE)
        if (rst == `OR1200_RST_VALUE)
                dcpu_vpn_r <=  {31-`OR1200_DMMU_PS{1'b0}};
                dcpu_vpn_r <=  {32-`OR1200_DMMU_PS{1'b0}};
        else
        else
                dcpu_vpn_r <=  dcpu_adr_i[31:`OR1200_DMMU_PS];
                dcpu_vpn_r <=  dcpu_adr_i[31:`OR1200_DMMU_PS];
 
 
//
//
// Physical address is either translated virtual address or
// Physical address is either translated virtual address or

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.