Line 534... |
Line 534... |
//
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//
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// du_except_stop comes from or1200_except
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// du_except_stop comes from or1200_except
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//
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//
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always @(du_except_stop) begin
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always @(du_except_stop) begin
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except_stop = 14'b00_0000_0000_0000;
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except_stop = 14'b00_0000_0000_0000;
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casex (du_except_stop)
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casez (du_except_stop)
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14'b1x_xxxx_xxxx_xxxx:
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14'b1?_????_????_????:
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except_stop[`OR1200_DU_DRR_TTE] = 1'b1;
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except_stop[`OR1200_DU_DRR_TTE] = 1'b1;
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14'b01_xxxx_xxxx_xxxx: begin
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14'b01_????_????_????: begin
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except_stop[`OR1200_DU_DRR_IE] = 1'b1;
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except_stop[`OR1200_DU_DRR_IE] = 1'b1;
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end
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end
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14'b00_1xxx_xxxx_xxxx: begin
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14'b00_1???_????_????: begin
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except_stop[`OR1200_DU_DRR_IME] = 1'b1;
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except_stop[`OR1200_DU_DRR_IME] = 1'b1;
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end
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end
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14'b00_01xx_xxxx_xxxx:
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14'b00_01??_????_????:
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except_stop[`OR1200_DU_DRR_IPFE] = 1'b1;
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except_stop[`OR1200_DU_DRR_IPFE] = 1'b1;
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14'b00_001x_xxxx_xxxx: begin
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14'b00_001?_????_????: begin
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except_stop[`OR1200_DU_DRR_BUSEE] = 1'b1;
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except_stop[`OR1200_DU_DRR_BUSEE] = 1'b1;
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end
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end
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14'b00_0001_xxxx_xxxx:
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14'b00_0001_????_????:
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except_stop[`OR1200_DU_DRR_IIE] = 1'b1;
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except_stop[`OR1200_DU_DRR_IIE] = 1'b1;
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14'b00_0000_1xxx_xxxx: begin
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14'b00_0000_1???_????: begin
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except_stop[`OR1200_DU_DRR_AE] = 1'b1;
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except_stop[`OR1200_DU_DRR_AE] = 1'b1;
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end
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end
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14'b00_0000_01xx_xxxx: begin
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14'b00_0000_01??_????: begin
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except_stop[`OR1200_DU_DRR_DME] = 1'b1;
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except_stop[`OR1200_DU_DRR_DME] = 1'b1;
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end
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end
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14'b00_0000_001x_xxxx:
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14'b00_0000_001?_????:
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except_stop[`OR1200_DU_DRR_DPFE] = 1'b1;
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except_stop[`OR1200_DU_DRR_DPFE] = 1'b1;
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14'b00_0000_0001_xxxx:
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14'b00_0000_0001_????:
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except_stop[`OR1200_DU_DRR_BUSEE] = 1'b1;
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except_stop[`OR1200_DU_DRR_BUSEE] = 1'b1;
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14'b00_0000_0000_1xxx: begin
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14'b00_0000_0000_1???: begin
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except_stop[`OR1200_DU_DRR_RE] = 1'b1;
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except_stop[`OR1200_DU_DRR_RE] = 1'b1;
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end
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end
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14'b00_0000_0000_01xx: begin
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14'b00_0000_0000_01??: begin
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except_stop[`OR1200_DU_DRR_TE] = 1'b1;
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except_stop[`OR1200_DU_DRR_TE] = 1'b1;
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end
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end
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14'b00_0000_0000_001x: begin
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14'b00_0000_0000_001?: begin
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except_stop[`OR1200_DU_DRR_FPE] = 1'b1;
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except_stop[`OR1200_DU_DRR_FPE] = 1'b1;
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end
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end
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14'b00_0000_0000_0001:
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14'b00_0000_0000_0001:
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except_stop[`OR1200_DU_DRR_SCE] = 1'b1;
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except_stop[`OR1200_DU_DRR_SCE] = 1'b1;
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default:
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default:
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Line 910... |
Line 910... |
`ifdef OR1200_DU_TB_IMPLEMENTED
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`ifdef OR1200_DU_TB_IMPLEMENTED
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or tb_wadr or tbia_dat_o or tbim_dat_o
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or tb_wadr or tbia_dat_o or tbim_dat_o
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or tbar_dat_o or tbts_dat_o
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or tbar_dat_o or tbts_dat_o
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`endif
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`endif
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)
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)
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casex (spr_addr[`OR1200_DUOFS_BITS]) // synopsys parallel_case
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casez (spr_addr[`OR1200_DUOFS_BITS]) // synopsys parallel_case
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`ifdef OR1200_DU_DVR0
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`ifdef OR1200_DU_DVR0
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`OR1200_DU_DVR0:
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`OR1200_DU_DVR0:
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spr_dat_o = dvr0;
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spr_dat_o = dvr0;
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`endif
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`endif
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`ifdef OR1200_DU_DVR1
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`ifdef OR1200_DU_DVR1
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