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Line 41... |
//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//
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//
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// CVS Revision History
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// CVS Revision History
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: or1200_freeze.v,v $
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// Revision 2.0 2010/06/30 11:00:00 ORSoC
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// Minor update:
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// Bugs fixed.
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//
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// Revision 1.8 2004/06/08 18:17:36 lampret
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// Non-functional changes. Coding style fixes.
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//
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// Revision 1.7 2004/04/05 08:29:57 lampret
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// Revision 1.7 2004/04/05 08:29:57 lampret
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// Merged branch_qmem into main tree.
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// Merged branch_qmem into main tree.
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//
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//
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// Revision 1.6.4.2 2003/12/05 00:09:49 lampret
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// Revision 1.6.4.2 2003/12/05 00:09:49 lampret
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// No functional change.
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// No functional change.
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Line 121... |
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// Internal i/f
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// Internal i/f
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multicycle, flushpipe, extend_flush, lsu_stall, if_stall,
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multicycle, flushpipe, extend_flush, lsu_stall, if_stall,
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lsu_unstall, du_stall, mac_stall,
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lsu_unstall, du_stall, mac_stall,
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force_dslot_fetch, abort_ex,
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force_dslot_fetch, abort_ex,
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genpc_freeze, if_freeze, id_freeze, ex_freeze, wb_freeze,
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genpc_freeze, if_freeze, id_freeze, ex_freeze, wb_freeze, saving_if_insn,
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icpu_ack_i, icpu_err_i
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icpu_ack_i, icpu_err_i
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);
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);
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//
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//
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// I/O
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// I/O
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| Line 138... |
Line 145... |
output genpc_freeze;
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output genpc_freeze;
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output if_freeze;
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output if_freeze;
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output id_freeze;
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output id_freeze;
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output ex_freeze;
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output ex_freeze;
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output wb_freeze;
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output wb_freeze;
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input saving_if_insn;
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input icpu_ack_i;
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input icpu_ack_i;
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input icpu_err_i;
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input icpu_err_i;
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//
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//
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// Internal wires and regs
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// Internal wires and regs
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| Line 162... |
Line 170... |
// 2. Inserting NOPs in the middle of pipeline only if supported:
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// 2. Inserting NOPs in the middle of pipeline only if supported:
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// At this time, only ex_freeze (and wb_freeze) can be deassrted when id_freeze (and if_freeze) are asserted.
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// At this time, only ex_freeze (and wb_freeze) can be deassrted when id_freeze (and if_freeze) are asserted.
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// This way NOP is asserted from stage ID into EX stage.
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// This way NOP is asserted from stage ID into EX stage.
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//
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//
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//assign genpc_freeze = du_stall | flushpipe_r | lsu_stall;
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//assign genpc_freeze = du_stall | flushpipe_r | lsu_stall;
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assign genpc_freeze = du_stall | flushpipe_r;
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//assign genpc_freeze = du_stall | flushpipe_r;
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assign genpc_freeze = (du_stall & !saving_if_insn) | flushpipe_r;
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assign if_freeze = id_freeze | extend_flush;
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assign if_freeze = id_freeze | extend_flush;
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//assign id_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze | force_dslot_fetch) & ~flushpipe | du_stall;
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//assign id_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze | force_dslot_fetch) & ~flushpipe | du_stall;
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assign id_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze | force_dslot_fetch) | du_stall | mac_stall;
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assign id_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze | force_dslot_fetch) | du_stall | mac_stall;
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assign ex_freeze = wb_freeze;
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assign ex_freeze = wb_freeze;
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//assign wb_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze) & ~flushpipe | du_stall | mac_stall;
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//assign wb_freeze = (lsu_stall | (~lsu_unstall & if_stall) | multicycle_freeze) & ~flushpipe | du_stall | mac_stall;
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