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Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_ic_fsm.v] - Diff between revs 258 and 358

Rev 258	Rev 358
Line 134...	Line 134...
!cache_inhibit \| (state == `OR1200_ICFSM_LREFILL3);	!cache_inhibit \| (state == `OR1200_ICFSM_LREFILL3);

`//`	`//`
`// Main IC FSM`	`// Main IC FSM`
`//`	`//`
`always @(posedge clk or posedge rst) begin`	always @(posedge clk or `OR1200_RST_EVENT rst) begin
`if (rst) begin`	if (rst == `OR1200_RST_VALUE) begin
state <= `OR1200_ICFSM_IDLE;	state <= `OR1200_ICFSM_IDLE;
`saved_addr_r <= 32'b0;`	`saved_addr_r <= 32'b0;`
`hitmiss_eval <= 1'b0;`	`hitmiss_eval <= 1'b0;`
`load <= 1'b0;`	`load <= 1'b0;`
`cnt <= 3'b000;`	`cnt <= 3'b000;`