URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_qmem_top.v] - Diff between revs 258 and 358

Rev 258	Rev 358
Line 317...	Line 317...
`assign qmem_addr = (qmemdmmu_cycstb_i & daddr_qmem_hit) ? qmemdmmu_adr_i : qmemimmu_adr_i;`	`assign qmem_addr = (qmemdmmu_cycstb_i & daddr_qmem_hit) ? qmemdmmu_adr_i : qmemimmu_adr_i;`

`//`	`//`
`// QMEM control FSM`	`// QMEM control FSM`
`//`	`//`
`always @(posedge rst or posedge clk)`	always @(`OR1200_RST_EVENT rst or posedge clk)
`if (rst) begin`	if (rst == `OR1200_RST_VALUE) begin
state <= `OR1200_QMEMFSM_IDLE;	state <= `OR1200_QMEMFSM_IDLE;
`qmem_dack <= 1'b0;`	`qmem_dack <= 1'b0;`
`qmem_iack <= 1'b0;`	`qmem_iack <= 1'b0;`
`end`	`end`
`else case (state) // synopsys parallel_case`	`else case (state) // synopsys parallel_case`