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https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk
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Line 92... |
reg [fw-1:0] wr_pntr;
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reg [fw-1:0] wr_pntr;
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reg [fw-1:0] rd_pntr;
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reg [fw-1:0] rd_pntr;
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reg empty_o;
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reg empty_o;
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reg full_o;
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reg full_o;
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always @(posedge clk_i or posedge rst_i)
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always @(posedge clk_i or `OR1200_RST_EVENT rst_i)
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if (rst_i) begin
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if (rst_i == `OR1200_RST_VALUE) begin
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full_o <= 1'b0;
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full_o <= 1'b0;
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empty_o <= 1'b1;
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empty_o <= 1'b1;
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wr_pntr <= {fw{1'b0}};
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wr_pntr <= {fw{1'b0}};
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rd_pntr <= {fw{1'b0}};
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rd_pntr <= {fw{1'b0}};
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cntr <= {fw+2{1'b0}};
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cntr <= {fw+2{1'b0}};
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