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[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_sb_fifo.v] - Diff between revs 10 and 141

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Rev 10 Rev 141
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//
//
// CVS Revision History
// CVS Revision History
//
//
// $Log: not supported by cvs2svn $
// $Log: or1200_sb_fifo.v,v $
 
// Revision 2.0  2010/06/30 11:00:00  ORSoC
 
// No update 
 
//
 
// Revision 1.3  2002/11/06 13:53:41  simons
 
// SB mem width fixed.
 
//
// Revision 1.2  2002/08/22 02:18:55  lampret
// Revision 1.2  2002/08/22 02:18:55  lampret
// Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board.
// Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board.
//
//
// Revision 1.1  2002/08/18 19:53:08  lampret
// Revision 1.1  2002/08/18 19:53:08  lampret
// Added store buffer.
// Added store buffer.

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