URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_sprs.v] - Diff between revs 142 and 151

Rev 142	Rev 151
Line 249...	Line 249...
`assign du_dat_cpu = du_read ? to_wbmux : du_write ? du_dat_du : dat_i;`	`assign du_dat_cpu = du_read ? to_wbmux : du_write ? du_dat_du : dat_i;`

`//`	`//`
`// Write into SPRs when DU or l.mtspr`	`// Write into SPRs when DU or l.mtspr`
`//`	`//`
`assign spr_we = du_write \| ex_spr_write;`	`assign spr_we = du_write \| ( ex_spr_write & !du_access );`


`//`	`//`
`// Qualify chip selects`	`// Qualify chip selects`
`//`	`//`
assign spr_cs = unqualified_cs & {32{du_read \| du_write \| ex_spr_read \| (ex_spr_write & sr[`OR1200_SR_SM])}};	assign spr_cs = unqualified_cs & {32{du_read \| du_write \| ex_spr_read \| (ex_spr_write & sr[`OR1200_SR_SM])}};