URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_top.v] - Diff between revs 481 and 679

Rev 481	Rev 679
Line 95...	Line 95...
`);`	`);`

parameter dw = `OR1200_OPERAND_WIDTH;	parameter dw = `OR1200_OPERAND_WIDTH;
parameter aw = `OR1200_OPERAND_WIDTH;	parameter aw = `OR1200_OPERAND_WIDTH;
parameter ppic_ints = `OR1200_PIC_INTS;	parameter ppic_ints = `OR1200_PIC_INTS;
	parameter boot_adr = `OR1200_BOOT_ADR;

`//`	`//`
`// I/O`	`// I/O`
`//`	`//`

Line 521...	Line 522...
`);`	`);`

`//`	`//`
`// Instantiation of IMMU`	`// Instantiation of IMMU`
`//`	`//`
`or1200_immu_top or1200_immu_top(`	`or1200_immu_top`
	`#(.boot_adr(boot_adr))`
	`or1200_immu_top(`
`// Rst and clk`	`// Rst and clk`
`.clk(clk_i),`	`.clk(clk_i),`
`.rst(rst_i),`	`.rst(rst_i),`

`ifdef OR1200_BIST	`ifdef OR1200_BIST